Table of Contents
Advertisement
5 INTERRUPT
5.4 NMI
The watchdog timer embedded in this IC can generate a non-maskable interrupt (NMI). This interrupt takes prece-
dence over other interrupts and is unconditionally accepted by the CPU.
For detailed information on generating NMI, refer to the "Watchdog Timer" chapter.
Seiko Epson Corporation
5-4
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)
Advertisement
Table of Contents
