Interrupts - Epson S1C17M01 Technical Manual

Cmos 16-bit single chip microcontroller
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Transition takes place automatically by the
initial boot sequence after a request from
the reset source is canceled.
OSC1
HALT
OSC1
RUN
∗ In RUN and HALT modes, the clock sources not used
as SYSCLK can be all disabled.
Figure 2.4.2.1 Operating Mode-to-Mode State Transition Diagram
Canceling HALT or SLEEP mode
The conditions listed below generate the HALT/SLEEP cancelation signal to cancel HALT or SLEEP mode and
put the CPU into RUN mode. This transition is executed even if the CPU does not accept the interrupt request.
• Interrupt request from a peripheral circuit
• NMI
• Debug interrupt
• Reset request

2.5 Interrupts

CLG has a function to generate the interrupts shown in Table 2.5.1.
Interrupt
IOSC oscillation stabilization
waiting completion
OSC1 oscillation stabilization
waiting completion
OSC1 oscillation stop
IOSC oscillation auto-trim-
ming completion
CLG provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent to the interrupt
controller only when the interrupt flag, of which interrupt has been enabled by the interrupt enable bit, is set. For
more information on interrupt control, refer to the "Interrupt Controller" chapter.
S1C17M01 TECHNICAL MANUAL
(Rev. 1.2)
RESET
(Initial state)
IOSC
RUN
CLGSCLK.CLKSRC[1:0] = 0x3
Table 2.5.1 CLG Interrupt Function
Interrupt flag
CLGINTF.IOSCSTAIF When the IOSC oscillation stabilization waiting
CLGINTF.OSC1STAIF When the OSC1 oscillation stabilization waiting
CLGINTF.OSC1STPIF When OSC1CLK is stopped, or when the
CLGINTF.IOSCTEDIF When the IOSC oscillation auto-trimming op-
Seiko Epson Corporation
2 POWER SUPPLY, RESET, AND CLOCKS
IOSC
HALT
CLGSCLK.CLKSRC[1:0] = 0x1
Set condition
operation has completed after the oscillation
starts
operation has completed after the oscillation
starts
CLGOSC.OSC1EN or CLGOSC1.OSDEN bit
setting is altered from 1 to 0.
eration has completed
slp instruction
RUN
HALT/SLEEP
cancelation signal
(wake-up)
Debug interrupt
RUN/
HALT/
DEBUG
SLEEP
retd instruction
EXOSC
RUN
EXOSC
HALT
Clear condition
Writing 1
Writing 1
Writing 1
Writing 1
SLEEP
2-11

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