ViewSonic N1930w-2M Service Manual page 29

DREXT Analog Input Reference Current Generator, 820 ohm to Ground 170
HSYNC0 Schmitt Trigger Input
w/ 5V-tolerant
HSYNC / Composite Sync for VGA Input from channel 0 9
VSYNC0 Schmitt Trigger Input
w/ 5V-tolerant
VSYNC for VGA Input from channel 1 10
HSYNC1 Schmitt Trigger Input
w/ 5V-tolerant
HSYNC / Composite Sync for VGA Input from channel 1 8
VSYNC1 Schmitt Trigger Input
w/ 5V-tolerant
VSYNC for VGA Input from channel 1 7
Digital Panel Output Interface
LVA0M Output LVDS A-Link Channel 0 Negative Data Output 186
LVA0P Output LVDS A-Link Channel 0 Positive Data Output 185
LVA1M Output LVDS A-Link Channel 1 Negative Data Output 184
LVA1P Output LVDS A-Link Channel 1 Positive Data Output 183
LVA2M Output LVDS A-Link Channel 2 Negative Data Output 182
LVA2P Output LVDS A-Link Channel 2 Positive Data Output 181
LVACKM Output LVDS A-Link Negative Clock Output 180
LVACKP Output LVDS A-Link Positive Clock Output 179
LVA3M Output LVDS A-Link Channel 3 Negative Data Output 178
LVA3P Output LVDS A-Link Channel 3 Positive Data Output 177
LVB0M Output LVDS B-Link Channel 0 Negative Data Output 199
LVB0P Output LVDS B-Link Channel 0 Positive Data Output 198
LVB1M Output LVDS B-Link Channel 1 Negative Data Output 197
LVB1P Output LVDS B-Link Channel 1 Positive Data Output 196
LVB2M Output LVDS B-Link Channel 2 Negative Data Output 195
LVB2P Output LVDS B-Link Channel 2 Positive Data Output 194
LVBCKM Output LVDS B-Link Negative Clock Output 190
LVBCKP Output LVDS B-Link Positive Clock Output 189
LVB3M Output LVDS B-Link Channel 3 Negative Data Output 188
LVB3P Output LVDS B-Link Channel 3 Positive Data Output 187
Internal MCU Interface with Serial Flash Memory
SAR3 Analog Input SAR Low Speed ADC Input 3 204
SAR2 Analog Input SAR Low Speed ADC Input 2 203
SAR1 Analog Input SAR Low Speed ADC Input 1 202
SAR0 Analog Input SAR Low Speed ADC Input 0 201
SCK Output SPI Interface Sampling Clock 171
SDI Output SPI Interface Data-In 172
SDO Input w/ 5V-tolerant SPI Interface Data-Out 173
CSZ Output SPI Interface Chip Select 174
GPIO_P10-GPIO_P17 I/O w/ 5V-tolerant General Purpose Input/Output; 4mA driving
strength
41-48
UART_TX I/O w/ 5V-tolerant Universal Asynchronous Transmitter 55
UART_RX I/O w/ 5V-tolerant Universal Asynchronous Receiver 56
IRIN Input w/5V-tolerant IR Receiver Input 57
INT Input MCU Bus Interrupt; 4mA driving strength 58
SCLM Output I2C Master Clock 59
SDAM I/O w/ 5V-tolerant I2C Master Data 60
DDC_SCL I/O DDC Clock for D-SUB Input 33
DDC_SDA I/O DDC Data for D-SUB Input 34
DDC_ROMSCL I/O DDC ROM Clock for D-SUB Input 35
DDC_ROMSDA I/O DDC ROM Data for D-SUB Input 36
SDRAM Interface
SDR_CSZ Output SDRAM Chip Select; active low 134
SDR_CKE Output SDRAM Clock Enable 126
SDR_AD[11:0] Output SDRAM Address Bus 148-137
26
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