C. Characteristics; Cpu Interface Timing; Interface Timing; Figure 7-1 Sh-4 Timing - Epson S1D13505F00A Technical Manual

7: A.C. CHARACTERISTICS
7 A.C. C
HARACTERISTICS
Conditions: Conditions: V
T = -40°C to 85°C
A
T and T
rise fall
C = 50pF (CPU Interface), unless noted
L
C = 100pF (LCD Panel Interface)
L
C = 10pF (Display Buffer Interface)
L
C = 10pF (CRT Interface)
L

7.1 CPU Interface Timing

SH-4 Interface Timing
t1 t2
CKIO
t4
A[20:0], M/R#
RD/WR#
t6
BS#
t8
CSn#
WEn#
RD#
RDY#
D[15:0](write)
D[15:0](read)
Notes: • The above timing diagram is not applicable if the BUSCLK divided by 2 configuration option is se-
lected.
• The SH-4 Wait State Control Register for the area in which the S1D13505 resides must be set to
a non-zero value. The SH-4 read-to-write cycle transition must be set to a non-zero value (with
reference to BUSCLK).
1-26
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= 3.0V ± 10% and V = 5.0V ± 10%
DD DD
for all inputs must be ≤ 5 nsec (10% to 90%)
t3
t7
t12
t9
t12
t11
t13

Figure 7-1 SH-4 Timing

EPSON
S1D13505F00A HARDWARE FUNCTIONAL
t5
t10
t14
t15
t16
SPECIFICATION (X23A-A-001-12)