Sch02-Audio Process - Denon HEOS 7 HS2 Service Manual

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AUDIO PROCESS
A
R 25 0R
AIOS_SCL K
R 26
0R
AIOS_L R CL K
B
R 30
0R
AIOS_I2S_OUT
AIOS_I2S_IN R 197 0R
C
R 8
3.3V D
R 9
4.7K 4.7K
3.3V D 3.3V A_DSP
L 1
D
C12
C13
600R @100MHz
3.3V A
0.1uF 22uF
L 30
R 38 0R
600R @100MHz(DNI)
OPT IONAL
E
HP_GND
3.3V D
F
C6 C7 C8
C5
22uF
0.1uF 0.1uF 0.1uF
G
T P7
C26
R 47
AUX _IN_L
H
8.2K
C28
R 29 C27 10uF
10K 100pF 330pF
AGND2
C25
10uF
T P9
AUX _GND R 50
J
10K
AUX _GND
C38
330pF
10K
C42
T P2 10uF
R 58
AUX _IN_R
K
8.2K
R 33
C170
10K
330pF
100pF
AGND2
AUX _GND
L
M
1 2 3
4 5 6
R 31 33R
3.3V D T P106 R 23 33R
R 196
T P108 R 24 33R
3.3V D 1K
R 192
1K
R 215 1K
DSP U1
NPCA110T
1 24
GPIO02/SDI0 nR E SE T
2 23
GPIO03/SDI1 V DD
3 22
GPIO04/SDI2 V D18
4 21
GPIO14 V SSP
5 20
GPO18/SDO2/I2CMS V PL L 18
6 19
V DD X T AL O
7 18
V SS X T AL I/CL K IN
8 17
L OUT 2 GPIO20
3.3V D
HP_GND
C16
C15 3.3V A_DSP
C18
C17
R 227
22uF
0.1uF
22uF
0.1uF
HP_GND
C9
Aux In High Common-Mode Noise Rejection Circuit
0.1uF
R 45
R 46
C24
12K
T P1
10K
R 48 68pF AGND2
3.3V _AUX
27K
AGND2
R 49 27K
C34
1uF
R 52
C39
68pF U10
DR V 632PW
AGND2
R 62 C43
C44 1uF
T P14
27K
C75
R 97 68pF R 98
3.3V _AUX
12K 10K
AGND2
4 5 6
7 8 9 10
DSP_I2S_D2
DSP_I2S_D1
DSP_I2S_D0
3.3V D
5V D_SW
R 27 0R
SCL 2
R 28 0R
SDA2
DSP_R E SE T 1
C138
3.3V D
0.1uF
C2
4.7uF
C4
C3
4.7uF
R 32
0R
2.2uF
AIOS_MCL K
R 214
33R (DNI)
HP_R
C21
2.2uF
R 236
HP_L
10K 10K
HP_GND
R 42
L IN_IN_L
15K
C23 C22
47pF
10uF
AGND2
3.3V D
L 2
C29 C31
600R @100MHz
C30
0.1uF 1uF 10uF
3.3V A
L 31
600R @100MHz(DNI)
OPT IONAL
AV Gain= -1V/V
C172
10uF
R 96
L IN_IN_R
15K
C171
47pF
AGND2
7 8 9 10
31
11 12 13
L 12
C242
600R @100MHz
R 610
30K 0.1uF
bias
HP_GND
R 611
15K
R 40
6.8K
HP_GND
R 130
2
+ 1
15K
bias 3 -
R 160
U15A
1K
L M358AM
R 161
HP_GND
6.8K
R 191
R 213
1K
6
7
15K
bias 5
U15B
L M358AM
24-Bit, 96-kHz Stereo A/D Converter
R 198
C33
C32 R 263
0.1uF 10uF
AGND2
5V D_SW
L 33
600R @100MHz
C35
C40
C41
0.1uF
R 199 0R 0.1uF
10uF
AGND2
11 12 13
14 15 16
A
B
C
C11
R 139
2.2uF
0R
MIC
R 210
D
2.2K (DNI)
0603
HP_GND
E
F
AIOS_I2S_IN
AIOS_I2S_IN
33R
AIOS_SCL K
U9
PCM1808PWR
G
AIOS_L R CL K
3.3V D
C241
0.1uF
R 241
33R
H
AIOS_MCL K
0R (DNI)
1
V CC
4
A
2
Y
NE T .ST B Y _ON1
B
GND
3.3V D U20
SN74AUP1G08
J
C36
10uF
K
L
M
SCHEMATIC DIAGRAMS (02/11)

SCH02-AUDIO PROCESS

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