Data Assurance By Program - Mitsubishi Electric MELSEC iQ-R Series User Manual

Data assurance by program

This section describes how to avoid the inconsistency of data larger than 64 bits using the program. To set up the module-by-
module data guarantee using the parameters, use the multiple CPU setting. ( Page 351 Module-by-module data
guarantee)
Data assurance in communication through the refresh
Inconsistency of transferred data can be avoided by setting the interlock device to a transfer number lower than the one for
the transferred data, because data is transferred in descending order from the highest setting number in the refresh settings.
Ex.
Interlock program in communication by refresh
• Parameter settings
CPU No.1 refresh setting
CPU Transfer Send/receive range
No. No. for each CPU module
Number
of points
CPU Transfer 2
No.1 No.1
Transfer 10
No.2
CPU Transfer 2
No.2 No.1
• Program example
Write
Send program (CPU No.1)
instruction
M100 M0 M32
M0 M32
Send/receive
device setting
start end start end
0 1 M0 M31
2 11 D0 D9
0 1 M32 M63
M0
Set send data
for D0 to D9.
SET M0
M0
RST M0
RST M100
Direction CPU No.2 refresh setting
CPU Transfer
No. No.

CPU Transfer
No.1 No.1
Transfer
No.2

CPU Transfer
No.2 No.1
Receive program (CPU No.2)
M32
Operation using receive
data (D0 to D9)
SET M32
M32
RST M32
23 MULTIPLE CPU SYSTEM FUNCTION
23.4 Data Communication Between CPU Modules
Send/receive range Send/receive
for each CPU module device setting
Number start end start
of points
2 0 1 M0
10 2 11 D100
2 0 1 M32
end
M31
D109
23
M63
359