Sony MHC-AG121 Service Manual page 44

HCD-RG121
Pin No. Pin Name
97 XLAT
98 CLOCK
99 VDD
100 SENS
101 SCLK
102 ATSK
103 WFCK
104 XUGF
105 XPCK
106 GFS
107 C2PO
108 SCOR
109 VDD
110 C4M
111 WDCK
112 COUT
44
I/O
I Latch input from CPU The serial data is latched at the falling edge
I Serial data transfer clock input from CPU
– Internal digital power supply
O SENS output to CPU
I SENS serial data readout clock input
I/O Anti-shock input/output
O WFCK output (Not used)
O XUGF output (Not used)
O XPCK output (Not used)
O GFS output (Not used)
O C2PO output (Not used)
O High output when the subcode sync, S0 or S1, is detected
– Internal digital power supply
O 4 2336MHz output (Not used)
O Word clock output f = 2Fs (Not used)
I/O Track number count signal input/output (Not used)
Description