Teac AG-D9260 Service Manual page 13

PIN No. SYM BOL
70 RAM A2
72 ~ 79 RAM D0~7
82 SDWCK0
83 SDBCK0
84 SDIA0
85 SDIA1
86 RAM A1
87 RAM A0
88 RAM WEN
89 RAM OEN
92 ~ 99 IPORT7~0
NOTE) Is: Schm idt trigger input term inal
O: Digital output term inal
A: Analog term inal
YSS912C PIN CONFIGURATION
RAMCEN
RAMA16
RAMA15
DTSDATA
AC3DATA
RAMA14
RAMA13
RAMA12
RAMA11
RAMA10
I/ O
O External SRAM interface address 2
I+/O External SRAM interface data (STREAM0~7 output when External SRAM is not in use)
I Word clock input for SDIA, SDOA, SDIB, SDOB
I Bit clock input for SDIA,SDOA,SDIB,SDOB
I AC-3 Bitstream (or PCM ) data input for M ain DSP
I AC-3 Bitstream (or PCM ) data input for M ain DSP
O External SRAM interface address 1
O External SRAM interface address 0
O External SRAM interface /WE
O External SRAM interface /OE
I+ Input port for general purpose (not use)
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
VDD1 1
2
3
4
SDIB0 5
SDIB1 6
SDIB2
7
XI
8
XO
9
VSS 10
AVDD 11
SDIB3
12
TEST
13
TEST 14
OVFB
15
16
17
SDOB3
18
CPO
19
AVSS
20
VDD2
21
SDOA2
22
SDOA1
23
SDOA0
24
25
26
27
28
29
30
VSS
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
DESCRIPTION
It: Input term inal w ith pull-up resistor
Ot: Tri-state digital output term inal
80 VSS
79 RAMD7
78 RAMD6
77
RAMD5
76 RAMD4
75 RAMD3
RAMD2
74
RAMD1
73
RAMD0
72
71 VDD1
RAMA2
70
SCK
69
68 SI
67 SO
/CS
66
65 /CSB
RAMA3
64
TEST
63
/IC
62
RAMA4
61
60
VSS
59
RAMA5
58
RAMA6
57
/SDBCK0
56
SURENC
55 KARAOKE
MUTE
54
CRC
53
52 NONPCM
51
VDD2
13