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Denon AVR-X3300W Service Manual page 17

Integrated network av receiver
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SCH11_CPU
D8
D9
TO
TO 9D
HDMI RX
TO ADV8003
ADV7850
TO 8D
0D
DSP1FLAG3
DSP1CLK
DSP1MISO
DSP1MOSI
DSP1RST
DSP1CS
DSP1FLAG0
DSP_BUSY
DSP_ROM_WRITE
TO D0
2A
MVOL_MUTE
Z2PLDAERR
DAC.PLDAERR.
DIR_RST.
DIR_CLK
DIR_DOUT
DIR_DIN
DIR_CE
JTAG_TMS/APLD_CS
JTAG_TDI/APLD_DT/DAC_DT
JTAG_TCK/APLD_CLK/DAC_CLK
JTAG_TDO
PLD_WRITE
TO A2
6B
DAC_RST1
DAC_MS1
JTAG_TCK/APLD_CLK/DAC_CLK
JTAG_TDI/APLD_DT/DAC_DT
TO B6
※ OPTION TABLE
MODEL
R1524
R1525
AVR-X3300E3
OPEN
0
AVR-X3300E1C
10K
10K
AVR-X3300E2
0
OPEN
GND LINE
POWER+ LINE
POWER- LINE
ANALOG AUDIO
DIGITAL AUDIO
E0
TO CPU LEVEL CHG
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
E_PW2
E_POWER2
133
E_PW3
E_POWER3
134
E_PW4
E_POWER4
135
D5V_PW
D5V_POWER
D5V POWER
136
CEC_PW
CEC_POWER
133:E POWER2
CEC_POWER
137
DV_PW1
134:E POWER3
DV_POWER1
135:E POWER4
DV_POWER1
138
DV_PW2
DV_POWER2
DV_POWER2
139
VSS
140
DR_DIN
R1514
33
DIR_DIN
DIR DIN
141
C1364
100N-K
VCC
142
DR_CE
R1515
33
DIR CE
DIR_CE
143
DR_DOUT
R1516
33
DIR DOUT
DIR_DOUT
144
DR_CK
R1517
33
DIR CLK
DIR_CLK
145
DIR_RST.
DIR RST
146
HAINT
787_HAINT
RXINT0
147
R1533
33
ZVOL_STB
148
ZVOL_STB
DE_RST
ADV7850_RST
149
TX_HINT
R1534
33
787_HINT
TX_HINT
150
R1531
10K
VSS
151
TX_RST
787_RST
TX_RST
R1520
10K
152
C1365
100N-K
VCC
153
S2_HINT
R1521
33
788_2_HINT
SW2_HINT
154
U1018
R1522
10K
S2_RST
SW2_RST
788_2_RST
R5F564MJCDFC
155
S1_HINT
R1518
33
788_1_HINT
SW1_HINT
R1523
10K
156
S1_RST
788_1_RST
SW1_RST
157
TXEN
TX_EN
TXEN
158
THER_PROTA
159
THERMAL A
THER_PROTF
160
THERMAL F
R1519
33
RGB_YC
161
RGB/YC
162
VSS
THER_PROTE
163
THERMAL E
C1366
100N-K
164
VCC
R1535
33
NET_HDMI
165
NET/HDMI
CURRENT_DET
166
CURRENT DET
AMPSIG_DET
167
AMPSIGDET
168
MODE
KEY3
169
KEY3
174:VREFH0
175:AVCC0
KEY2
170
KEY2
Z2PLD_ERR
KEY1
171
KEY1
172
VREFL0
PLD_WRITE
173
PLD_WRITE
C1367
100N-K
174
C1368
100N-K
175
Z2PLDAERR
176
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18
19
20
21
22
23
R1437
OPEN
1
2
4
TMDS SIGNAL
ANALOG VIDEO
DIGITAL VIDEO
STBY POWER
TO 0E
R1393
OPEN
R1394
OPEN
5
6
7
8
4
3
2
1
99
98
97
96
95 94
93
92
91
90
89
109
108
107
106
105
104
103
102
101
100
88
DSP_ROM_WRITE
CEC_PW2
87
CEC_POWER2
DA_PW
86
DA_POWER
D_BSY
85
DSP_BUSY
DSP_BUSY
D_RST
DSP RST
84
DSP1RST
D_FLG0
DSP FLAG0
83
DSP1FLAG0
R1498
OPEN
D_CS
DSP CS
82
DSP1CS
D_CK
R1496
33
DSP CLK
81
DSP1CLK
D_MISO
80
DSP1MISO
DSP MISO
D_MOSI
R1495
33
DSP MOSI
79
DSP1MOSI
A_CK
R1494
33
AVSCL
78
AVSCL
A_DA
R1493
33
AVSDA
77
AVSDA
UB
76
UB
C1359
100N-K
75
VCC
IP_RST
IP_RST
74
R1489
10K
ADV8003_RST
VSS
73
R1487
33
ADV8003 SPI MO
72
ADV8003_SPI_MO
R1486
10
71
ADV8003_SPI_CLK
ADV8003 SPI CLK
70
ADV8003_SPI_MI
ADV8003 SPI MI
R1485
33
ADV8003 SPI CS
69
ADV8003_SPI_CS
CEC_IN
68
CEC_IN
CEC_OUT
67
CEC_OUT
C1355
100N-K
66
VCC_USBA
VSS1_USBA
65
USBA_DP
64
USBA_DM
63
VSS2_USBA
62
61
PVSS_USBA
AVSS_USBA
60
USBA_PREF
59
C1354
100N-K
AVCC_USBA
58
57
VSS_USB
56
USB0_DP
USB0_DM
55
C1353
100N-K
VCC_USB
54
8
1
R2182
AEXP DATA
53
AEXP_DATA
33*4(AR)
52
7
2
AEXP_CLK
AEXP CLK
51
6
3
AEXP_OE
AEXP OE
5
4
AEXP STB
50
AEXP_STB
47:V.PLD.TRANS2
PRE_Z2_MUTE
49
PRE_Z2_MUTE
46:E SPI REQ
R1480
33
45:E SPI MOEI
E RESET
48
E_RESET
47
V.PLDLTRANS2
R1478
0
46
E_SPI_REQ
R1477
33
45
E_SPI_MOEI
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38 39
40
41
42
43
44
QFP176
EMULATOR
3
2
4
6
8
10
1
3
5
7
9
17
6D
4B
TO B4
TO
CPU
TO D6
TO D.SUPPLY
NET PHY
6C
C1356
OPEN
CEC_COM
CEC_COM
H5VDET
R1488
Q1043
HINSELC
10K
2SD2114K
HINSELB
R1490
HINSELA
100K
HSCL
R1492
2M2
HSDA
SW2_HINT
SW2_RST
HPD4
R1505
HPD3
220K
D1097
HPD2
LBAS16HT1G
HPD1
8C
OPEN
HSCL
HSDA
SW1_HINT
SW1_RST
HPD5
HPD6
HPD7
16
15
14
13
12
11
10
9
2C
U1060
MC14094BDTR2G(OPEN)
RXINT0
1
2
3
4
5
6
7
8
TXEN
HPD8
TX_RST
TX_HINT
HSCL
HSDA
2B
NET_HDMI
RGB_YC
V.PLDLTRANS0
V.PLDLTRANS1
V.PLDLTRANS2
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
U1061
U1062
MC14094BDTR2G
MC14094BDTR2G
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R1457
4K7
R1458
4K7
R1459
10K
R1460
4K7
R1461
10K
R1462
4K7
R1463
4K7
R1464
4K7
11
N1021
1.0-16-11PB-2
MP OPEN
TO C6
TO C8
TO C2
TO B2

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