Denon AVR-X3200W Service Manual page 47

AVR-X3200W HDMI VIDEO BLOCK
fig.12c
HDMI SW2(MN864788)
P3 RX
HDMI IN1
(CBL/SAT)
MAIN
P2 RX
HDMI IN2
(DVD)
SUB
P1 RX
HDMI IN3
(BLU-RAY)
P0 RX
HDMI IN4
(GAME)
HDMI IN5
(MEDIA Player)
HDMI IN6
(AUX2)
HDMI IN7
(CD)
AD8195
HDMI IN8
Buffer
(AUX1)
DEC_Y_IN
DEC_PB_IN
DEC_PR_IN
DEC_CVBS_IN
Z2_HAINT
Z2HDMISPDIF
RXI2S0~3(DSD1~4), RXSPDIF(DSD0)
RXMCK(DSDMCK), RXBCK(DSDSCK), RXLRCK(DSD5), RXINT0
TXI2S0
TXBCK, TXLRCK
870VD0~7
870PCK
P0 TX
P1 TX
HDMI SW1(MN864788)
P3 RX
MAIN
P0 TX
P2 RX
SUB
P1 RX
P1 TX
P0 RX
ADV7850
HDMI TX(MN864787)
P1 RX
P0 RX
HDMI Rx 4K/2K
600MHz
Rxlink0
P3 RX
Up Scaler
Matrix SW
P2 RX
RXI2S0~3(DSD1~4), RXSPDIF(DSD0)
RXMCK(DSDMCK), RXBCK(DSDSCK), RXLRCK(DSD5), RXINT0
TXI2S0
TXBCK, TXLRCK
VIDEO PLD
EPM570F256C4N
870VD0~7
870PCK
AD55/058Z-0(ADV8003-8B)
Video Processor(1080P, OSD, IP Conv,)
CONTROL
DDR2 SDRAM
A3R12E40CBF-8E
47
P1 TX
600MHz
Txlink0 HDMI Tx
4K/2K ARC
Matrix SW
600MHz
Txlink1
4K/2K
DDR2 INTERFACE
DDR2 SDRAM
A3R12E40CBF-8E
512M 512M
HDMI ZONE2
HDMI OUT1