Denon AVR-X3200W Service Manual page 165

MC74HC4094ADR2G (DIGITAL : IC171, IC172, IC173, IC174, IC175)
Pin assignment
Logic Diagram
SN74LVC244APWR (DIGITAL : IC191)
Pin assignment
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Block Diagram
1OE
1A1
1A2
1A3
1A4
Pin numbers shown are for the DB, DGV, DW, N, NS, PW, and RGY packages.
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
V Supply voltage range
CC
V Input voltage range
I
V Voltage range applied to any output in the high-impedance or power-off state
O
V Voltage range applied to any output in the high or low state
(INPUT : IC898, IC899)
STR
QP
QP
QP
QP
GND
Figure 1. Pin Assignment
STAGE 0
D D Q
CP
FF0
CP
D Q
CP
latch
STR
OE
QP
0
LOGIC DIAGRAM (POSITIVE LOGIC)
1
2
4
6
8
(1)
(2)
V
1 16
CC
D OE
2 15
CP QP
3 14
4
QP
4 13
0 5
QP
5 12
1 6
QP
6 11
2 7
QS
7 10
3 2
QS
8 9
1
MC74HC4094A
STAGES 1 TO 6 STAGE 7
Q
D
D Q
CP
FF7
CP
D Q
CP
latch
2 D
3 CP
QP QP QP QP QP QP
1 2 3 4 5 6
Figure 5. Logic Diagram
1 STR
15 OE
SCAS414X – NOVEMBER 1992 – REVISED MARCH 2005
19
2OE
18 11
1Y1 2A1
16 13
1Y2 2A2
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3
14 15
1Y3 2A3
12 17
1Y4
2A4
165
(2)
(2) (3)
MC74HC4094A
3 1
CP STR
QS1
QS2
QP0
QP1
QP2
2 D D
QP3
QP4
QP5
QP6
QP7
OE
15
QS
1
D Q
QS
2
Figure 2. Logic Symbol
CP
latch
8 – Stage Shift Register
QP
7
8 – Bit Storage Register
3 – Stage Outputs
SN74LVC244A
QP0 QP1 QP2 QP3 QP4
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
4 5 6 7 14
Figure 4. Functional Diagram
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2
9
2Y1
7
2Y2
5
2Y3
3
2Y4
MIN MAX UNIT
–0.5 6.5
–0.5 6.5
–0.5 6.5
–0.5 V + 0.5
1
15
SRG8
3
9
C1/
10
4 2
1 D
5
6
7
14
13
12
11
Figure 3. IEC Lo
QS2 10
QS1 9
QP5 QP6 QP7
13 12 11
V
V
V
V
C
E
2