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1-2. PIN DESCRIPTION
Pin
Name
Type
No.
001 DIBVDD
002 CAP_HREF
I
003 CAP_HSYNC
I
004 CAP_VSYNC
I
005 DIBVSS
Ground Digital Input Buffer Ground
006 BLU_INB_0/Y0
I
007 BLU_INB_1/Y1
I
008 BLU_INB_2/Y2
I
009 BLU_INB_3/Y3
I
010 BLU_INB_4/Y4
I
011 BLU_INB_5/Y5
I
012 BLU_INB_6/Y6
I
013 BLU_INB_7/Y7
I
014 DCVDD
Power Digital Core Power
015 GRN_INB_0
I
016 GRN_INB_1
I
017 GRN_INB_2
I
018 GRN_INB_3
I
019 GRN_INB_4
I
020 GRN_INB_5
I
021 GRN_INB_6
I
022 GRN_INB_7/
I
RTS0
023 DCVSS
Ground Digital Core Ground
024 RED_INB_0/
I
UV0
025 RED_INB_1/
I
UV1
026 RED_INB_2/
I
UV2
027 RED_INB_3/
I
UV3
028 RED_INB_4/
I
UV4
029 RED_INB_5/
I
UV5
030 RED_INB_6/
I
UV6
031 RED_INB_7/
I
UV7
032 DIBVDD
Power Digital Input Buffer Power
033 DVDD
Power Digital VDD
034 DVSS
Ground Digital ground
035 DTEST
O
036 VCCD
Power Digital power
037 DGND
Ground Digital ground
Definition
Digital Input Buffer Power
Port B Horizontal Active Qualifier
Port B Horizontal Sync Input
Port B Vertical Sync Input
Port B Blue Input Bit 0/YUV Data Input
Y0
Port B Blue Input Bit 1/YUV Data Input
Y1
Port B Blue Input Bit 2/YUV Data Input
Y2
Port B Blue Input Bit 3/YUV Data Input
Y3
Port B Blue Input Bit 4/YUV Data Input
Y4
Port B Blue Input Bit 5/YUV Data Input
Y5
Port B Blue Input Bit 6/YUV Data Input
Y6
Port B Blue Input Bit 7/YUV Data Input
Y7
Port B Green Input Bit 0
Port B Green Input Bit 1
Port B Green Input Bit 2
Port B Green Input Bit 3
Port B Green Input Bit 4
Port B Green Input Bit 5
Port B Green Input Bit 6
Port B Green Input Bit 7
Port B Red Input Bit 0/YUV Data Input
UV0
Port B Red Input Bit 1/YUV Data Input
UV1
Port B Red Input Bit 2/YUV Data Input
UV2
Port B Red Input Bit 3/YUV Data Input
UV3
Port B Red Input Bit 4/YUV Data Input
UV4
Port B Red Input Bit 5/YUV Data Input
UV5
Port B Red Input Bit 6/YUV Data Input
UV6
Port B Red Input Bit 7/YUV Data Input
UV7
Digital test output
LL-T15S3 APPENDIX : IC DESCRIPTION
Pin
Name
Type
No.
038 VGA_VSYNC
039 VGA_HSYNC
040 SOGI
041 VCCA
Power Analog power for PLL
042 AGND
Ground Analog ground for PLL
043 VREF
044 CP
045 CZ
046 VCCAB
Power B channel analog power
047 BI
048 GNDAB
Ground B channel analog ground
049 BCLP
O
050 VTOP
O
051 VBOT
O
052 VCCAG
Power G channel analog power
053 GI
054 GNDAG
Ground G channel analog ground
055 GCLP
O
056 TOUTP
O
057 TOUTM
O
058 VCCAR
Power R channel analog power
059 RI
060 RNDAR
Ground R channel analog ground
061 RCLP
O
062 ADVDD
Power Display PLL Analog Power
(VDD_PLL)
063 ADVSS
Ground Display PLL Analog Ground
(VSS_PLL)
064 DCVSS
Ground Digital Core Ground
065 OSD_FSW
066 OSD_CLK
O
067 OSD_R
068 OSD_G
069 OSD_B
070 OSD_I
071 DCVDD
Power Digital Core Power
072 Reserved
R
073 XTAL
O
074 XTALI
075 DIBVSS
Ground Digital Input Buffer Ground
076 DISP_DE
O
077 DISP_VSYNC
O
6 – 2
Definition
I
Port A vertical SYNC
I
Port A horizontal SYNC
I
Port A Sync-On-Green input
I
External 25V reference voltage
I
PLL loop filter for pole
I
PLL loop filter for zero
I
B channel analog input
B channel internal clamp voltage out-
put
ADC resistor ladder top decoupling
capacitor
ADC resistor ladder bottom decou-
pling capacitor
I
G channel analog input
G channel internal clamp voltage out-
put
Differential testing output plus
Differential testing output minus
I
R channel analog input
R channel internal clamp voltage out-
put
I
External OSD Window Display Enable
Clock Output For External OSD Con-
troller Chip
I
R Data Input From External OSD Con-
troller Chip
I
G Data Input From External OSD Con-
troller Chip
I
B Data Input From External OSD Con-
troller Chip
I
Intensity Input From Ext OSD Control-
ler Chip
Reserved
Crystal Out
I
Crystal Input
Display Enable
Display Vertical Sync
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