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User Manual for Microboard Computer Development System CDP18S693 & CDP18S694
72
831F 3D lF;
0719
8321 D8;
0720
8322 3DlD;
0721
8324 3D34;
0722 HERE:
8326 FF013A 24;
0723 HEREl:
832A >
0724
832A 1 7;
0725 HERE2:
832B 9 3 ;
0726
832C >
0727
0728 SLIDE2
832C FE;
832D 352D;
0729 SLIDE3
832F D8;
0730
8330 352D;
0731
0732
8332 301C;
8334 >
0733
8334 FF0X;
0734 SLIDEl : SMI 1
8336 3D2C;
0735
8338 3A26;
0736
833A 302A;
0737
833C
0738
0739 .* * * * * * * * * * * * * ** * ** ** ** * ***** *** **** *** **** *** **** *** **** *** ****
833C
0740
833C
833D
0741
833D C087F0;
0742 PRMPT5 : LBR RENTER
8360 C 08085;
0743 ERR1:
8363
0744
0745 ••* * * * * * * * * * * * * * * * * * * * * * ***** *** **** *** **** *** **** *** **** *** ****
8363
8363
0746 . .DESC :
8363
0747 ..REG USED:
0748 ..* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
8363
8363
0749
8363
0750
8363
0751
8363 D3;
0752 EXITC:
8364 !
0753
i
8364 E2;
0754 CALLR:
8363 9673
0755
8367 8673
0756
8369 93B6
0757
836B 83A6
0758
836D 46B3
0759
836F 46A3
0760
8371 3063
0761
8373 >
0762
8373
0763
i
8373 D3;
0764 EXITR:
8374 >
0765
8374 96B3
0766 RETR:
8376 86A3
0767
8378 E212
0768
837A 72A6
0769
837C F0B6
0770
837E 9F;
0771
0772
837F >
837F 3073 ;
0773
8381
0774
0775 ..* ** ** ** * ** ** ** * ** ** ** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
8381
8381
0776 . .
8381
0777 . .
8381
0778 . .
BN2 *
..WAIT FOR TRANSITION
SEP BITRDR
..DELAY AND THEN RETEST
BN2 RDBIT
..T O BE SURE
BN2 SLIDEl
..TIM E OUT LOOP
SMI 1; BNZ HERE
INC PARITY
..S E T BIT READ AS A ONE
GHI PC
SHL
..PU T BIT IN DF
B2 *
..WAIT FOR BIT TO END
SEP BITRDR
..DELAY AND RETEST TO
B2 SLIDE3
..B E SURE
BR RBYE
..DECREMENT LOOP COUNT AND RETEST
BN2 SLIDE2
..BRANCH IF STILL FALSE TO SET BIT A ZERO
BNZ HEREl
. . I F TIME OUT GO TO SET BIT A ONE
BR HERE2
..ELSE CONTINUE TIMEOUT
ORG UT62+#035D
LBR ERROR
STANDARD CALL AND RETURN
S P , PC, CALL,,RETURN,LINK & STACK
ORG UT62+#0363
. . STANDARD CALL
SEP PC
SEX SP
GHI LINK;STXD
GLO LINK;STXD
GHI PC; PHI LINK
GLO PC;PLO LINK
LDA LINK;PHI PC
LDA LINK;PLO PC
BR EXITC
..STANDARD RETURN
SEP PC
GHI LINK; PHI PC
GLO LINK;PLO PC
SEX S P ; INC SP
LDXA;PLO LINK
LDX;PHI LINK
GHI CHAR
BR EXITR
REGISTER INITIALIZATION ROUTINE
INITIALIZES REGISTER C TO THE DELAY ROUTINE, REG 2 AS A STACK
POINTER TO LOCATION 8CFF HEX, REG 4 TO CALL, REG 5 TO RETURN
..GENERAL FOR THIS PAGE
. .GO TO IT
..S E T R(X)
..SAVE THE CURRENT LINK ON
..THE STACK
..P IC K UP THE SUBROUTINE
. .ADDRESS
..RETURN TO MAIN PGM.
..S E T THE STACK POINTER
..RESTORE THE CONTENTS OF
. .LINK
..PU T THE CONTENTS OF CHAR.1 INTO D
..BEFORE RETURNING
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