Advanced Chipset Setup - ECS 661FX-M Deluxe Manual

Small Logo (EPA) Show (Disabled)
Enables or disables the display of the EPA logo during boot.
Advanced Chipset Features
These items define critical timing parameters of the motherboard. You should
leave the items on this page at their default values unless you are very familiar
with the technical specifications of your system hardware. If you change the
values incorrectly, you may introduce fatal errors or recurring instability into
your system.
DRAM Clock/Timing Control
Scroll to this item and press <Enter> to view the following screen:
DRAM Timing Control (By SPD)
Enables you to select the CAS latency time in HCLKs of 2, 2.5, or 3. The value
is set at the factory depending on the DRAM installed. Do not change the values
in this field unless you change specifications of the installed DRAM or the
installed CPU.
DRAM CAS Latency (2.5T)
This item controls the timing delay (in clock cycles) before the DRAM starts a
read command after receiving it.
RAS Active Time (tRAS) (6T)
This item allows you to set the amount of time a RAS can be kept open for
multiple accesses. High figures will improve performance.
RAS Precharge Time (tRP) (3T)
This is the duration of the time interval during which the Row Address Strobe
signal to a DRAM is held low during normal Read and Write Cycles. This is the
minimum interval between completing one read or write and starting another
Using BIOS
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