Cdclvp111-Sp Evm (Cdclvp111Evm-Cval); Cdclvp111-Sp Setup And Quick Test - Texas Instruments CDCLVP111EVM-CVAL User Manual

CDCLVP111-SP EVM (CDCLVP111EVM-CVAL)

1 CDCLVP111-SP EVM (CDCLVP111EVM-CVAL)
The CDCLVP111-SP EVM is ideal for evaluating the CDCLVP111-SP. The CDCLVP111-SP is a 1 to 10
LVPECL buffer with selectable input. The evaluation setup is shown in
essentially a break-out board exposing full functionality of the device with flexible input and output-biasing
options.
CLK0/CLK1
Input Biasing
LVDS,
LVPECL,
Single Ended
2

CDCLVP111-SP Setup and Quick Test

The CDCLVP111-SP EVM is designed to ease lab-based evaluation by utilizing an offset LVPECL bias
point set to earth ground. This allows a two power supply setup to easily connect the outputs to standard
50-Ω terminated test equipment. Connecting this way provides the proper termination for LVPECL drivers.
The EVM also provides pads near SMA jacks for on-board 50-Ω termination for cases that may desire to
utilize high-impedance probes.
2
CDCLVP111-SP Evaluation Module (CDCLVP111EVM-CVAL)
CDCLVP111EVM-CVAL
CDCLVP111-SP
MUX
Input Clock Selection
Figure 1. CDCLVP111-SP EVM Block Diagram
Copyright © 2016, Texas Instruments Incorporated
Figure 1. The evaluation setup is
LVPECL
www.ti.com
Q0:Q9 Output
biasing:
50 Q š} 'E
through SMA, or
50 Q š} 'E À]
on-board
resistor.
SCAU055 – November 2016
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