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Analog Outputs
DaqBoard/500 Only
Channels
Resolution:
Output Voltage Ranges:
Settling time to 0.006%
of FSR:
Differential Linearity:
Accuracy:
Data Storage:
Clock/Update Sources:
Max update rate/channel
Waveform Triggering:
Output Current:
Digital Inputs / Outputs
Channels
Ports
I/O Direction Select:
Input Level:
High Level Input Voltage:
Low Level Input Voltage:
High Level Output
Voltage:
Low Level Output
Voltage:
Maximum Output
Current:
DaqBoard/500 Series
Note: Specifications subject to change without notice.
2; two clocked DACs designated as DAC0 and DAC1
16 bit
±10 V, 0 to 10 V
10 µsec for 20 V step
± 0.25 LSB @ 25° guaranteed monotonic
± 0.001 V
Internal FIFO/PC Memory
Asynchronous
o
Internal Pacer
o
External TTL
o
100khz
Software Command
o
External Trigger TTL
o
±5 mA
24 accessible from main I/O connector
3x8-bit Ports
Software selectable per three 8-bit ports
(Ports A,B, and C)
5.0V/3.3V CMOS/LSTTL compatible
with 4.7 K ohm pull-up resistor
2 V min.
0.8 V max.
2.4 V
0.4 V
Low: 12 mA (sinking)
High: 12 mA (sourcing)
947294
Specifications 6-3
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