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5
D
C
B
A
5
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+3VS
U7A
1
CPU_RD_N
3
CPU_PCS0_N
2
74VHC32
+3VS
CPU_A1
U7D
CPU_A2
CPU_WR_N
12
CPU_WR_N
11
CPU_PCS0_N
13
CPU_PCS0_N
74VHC32
+3VS
+3VS
U8B
74HC132
IOCS_WR_SET_N
4
6
5
S_B UFFER
+3VS
+3VS
9
8
RESET_N
10
U8C
74HC132
4
KEYPAD[0..9]
+3VS
U14A
CPU_A3
2
CPU_A3
A
Y0
CPU_A4
3
CPU_A4
B
Y1
Y2
IOCS_RD_SET_N
1
G
Y3
74VHC139
CPU_D[0..7]
+3VS
U14B
CPU_A1
14
12
A
Y0
CPU_A2
13
11
B
Y1
10
Y2
IOCS_WR_SET_N
15
9
G
Y3
74VHC139
CPU_D[0..7]
R78
5.1K
OUT_BUFFER_OE_N
RESET_N
4
3
4
IORD0_N
5
IORD1_N
6
LAMP_PROTECT
E1
WIRE_TP53
7
1
TP53
E1
WIRE_TP52
1
TP52
E1
WIRE_TP51
1
TP51
E1
WIRE_TP46
1
TP46
E1
WIRE_TP47
1
TP47
DVI_SCDT
SPAREI
CPU_D[0..7]
CP U_D0
CP U_D1
CP U_D2
CP U_D3
CP U_D4
CP U_D5
CP U_D6
CP U_D7
I OWR0_N
I OWR0_N
11
OUT_BUFFER_OE_N
74ABT574
CPU_D[0..7]
CP U_D0
CP U_D1
CP U_D2
CP U_D3
CP U_D4
CP U_D5
CP U_D6
CP U_D7
IOWR0_N1
OUT_BUFFER_OE_N
U18
RESETVCC
3
VDD
2
GND
1
RES
AME8500BEET
R80
1K
3.3VRESET
VDD
SOT23
3
1
2
RST
GND
AME8500AF27
3
2
+3VS
RP20 47_RP
KEYPAD0
INLTCH1_1
1
2
KEYPAD1
INLTCH1_2
3
4
KEYPAD2
INLTCH1_3
5
6
KEYPAD3
INLTCH1_4
7
8
KEYPAD4
INLTCH1_5
1
2
11
KEYPAD5
INLTCH1_6
3
4
13
KEYPAD6
INLTCH1_7
5
6
15
KEYPAD7
INLTCH1_8
7
8
17
IORD0_N
RP21 47_RP
19
+3VS
RP22 47_RP
KEYPAD8
INLTCH2_1
1
2
KEYPAD9
INLTCH2_2
3
4
INLTCH2_3
5
6
RP23
INLTCH2_4
7
8
INLTCH2_5
2
1
11
INLTCH2_6
4
3
13
INLTCH2_7
6
5
15
INLTCH2_8
8
7
17
47_RP
IORD1_N
19
+3VS
U17
RP24
47_RP
OUTLTCH1_1
2
19
1
2
D1
Q1
OUTLTCH1_2
3
18
3
4
D2
Q2
OUTLTCH1_3
4
17
5
6
D3
Q3
OUTLTCH1_4
5
16
7
8
D4
Q4
OUTLTCH1_5
6
15
1
2
D5
Q5
OUTLTCH1_6
7
14
3
4
D6
Q6
OUTLTCH1_7
8
13
5
6
D7
Q7
OUTLTCH1_8
DLP_SPARE
9
12
7
8
D8
Q8
RP25
47_RP
CLK
1
OC
+3VS
U22
OUTSPARE1
2
19
D1
Q1
OUTSPARE2
3
18
D2
Q2
OUTSPARE3
4
17
D3
Q3
OUTSPARE4
5
16
D4
Q4
OUTSPARE5
6
15
D5
Q5
OUTSPARE6
7
14
D6
Q6
OUTSPARE7
8
13
D7
Q7
OUTSPARE8
9
12
D8
Q8
11
CLK
R106
R107
R108
1
OC
0
0
0
74ABT574
SPAREO
+3VS
R77
180
RESETVCC
R118
100K
D3
3
BAV99
C88
1U Z
** Generate Harward RES
2
U1
2
1A
4
1A
6
1A
8
1A
2A
2A
2A
2A
1
1G
2G
74A
U1
2
1A
4
1A
6
1A
8
1A
2A
2A
2A
2A
1
1G
2G
74A
R75
10K
R109
0
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