Hitachi L32VK06U Service Manual page 109

1
uPD61305F1
AF12
FC1_CLK STP0CLK
AE11
STP0DAT0
FC1_DATA0
AF11
FC1_DATA1 STP0DAT1
A
AD10
STP0DAT2
FC1_DATA2
AE10
FC1_DATA3 STP0DAT3
AF10
STP0DAT4
FC1_DATA4
AC9
FC1_DATA5 STP0DAT5
AD9
STP0DAT6
FC1_DATA6
AE9
FC1_DATA7 STP0DAT7
AF9
STP0EN
FC1_VALID
AF8
FC1_ERR STP0ERRB
AE8
STP0STRT
FC1_SYNC
B
AD6
TS_CI_CLK STP1CLK
AD7
STP1DAT0
TS_CI_DATA0
AC7
STP1DAT1
TS_CI_DATA1
AB7
TS_CI_DATA2 STP1DAT2
AA7
STP1DAT3
TS_CI_DATA3
AB8
TS_CI_DATA4 STP1DAT4
AA8
STP1DAT5
TS_CI_DATA5
AB9
STP1DAT6
TS_CI_DATA6
AA9
STP1DAT7
TS_CI_DATA7
AC6
STP1EN
TS_CI_VALID
C
AA6
STP1ERRB
AB6
STP1STRT
TS_CI_SYNC
P23
AIBCK
N24
AIBD
N22
AILRCK
N23
AIOMCLK
R173
M25
AO0_BCK
I2S_CLK_DVB 47R
R174
M24
AO0_BD0
47R
A_BD0
R196
L25
AO0_LRCK
47R
A_LRCK
M26
D
AO0_MCLK
J26
AO1_BCK
K26
AO1_BD0
J24
AO1_LRCK
K25
AO1_MCK
E
R1015
3V3_VCC 4k7 A_BD0
R1047
R1217
3V3_VCC 4k7 I2S_CLK_DVB
3V3_VCC 4k7 A_LRCK
F
2 3
U1
R88
L26
ATX 47R
DVB_SPDIF
7 TP3
AB12
27MHz CLOCK OUTPUT
CLK27OUT 10k
R63
AA15
IR_EMMA
IR_IN0
TP11
AE12
IR_IN1
AA12
IR_OUT TP2
E16
JTCK JTCK
F17
JTDI
JTDI
E17
JTDO
JTDO
G16
JTMS JTMS
F16
JTRST
JTRST
G17
NMI NMI
10k
A21
R64
RXD0B UART1_RXD
AC11
RXD1B
R200
AB15
RXD2B 47R DVB_TXD
AE6
SCL0
AE7
SCL1
AF6
SDA0
AF7
SDA1
AC10
SMCLK0
100p
AA10
SMDAT0 C66
AB11
SMOFF0
AB10
SMRST0
AA11
SMVCC0
AA26
SYS_XT1
X5
AA25
SYS_XT2
50V 50V
18.432MHz
Y26
12p 12p
RSTOUT
RST_OUT
C351 C352
Y25
RSTSWB
nRESET
A20
TEST
AD11
TXD1B
R201
AD12
TXD2B 47R
DVB_RXD
H24
PPORT115
H26
PPORT116
H23
PPORT117
M23
PPORT118
J23
PPORT119
J21
PPORT120
L23
PPORT121
M22
PPORT124
NC
K23
PPORT157
NC
N21
PPORT158
NC
L22
PPORT159
NC
FC1_CLK
50V
12p
C356
These capacitors should be
near to EMMA3SL TS_CI_CLK
50V
12p
C355
4 5
I2C_CLK_DEMOD
I2C_DATA_DEMOD
100p
C65
R792
IR_EMMA
10k
R793
Q158
3V3_STBY
10k
BC848B
IR_IN
OPTIONAL IR CONNECTION
EMMA3SL RESET CIRCUIT
3V3_VCC
S1
DVB_RESET MAX809LTR
nRESET
C142
U6
C70
100n
16V
Q1
220R
BC848B
R348
6
5V_HDMI_EN
R443
nETH_RESET
R427
DVB_IRQ
R441
nETH_IRQ
R428
R409
R431
OPTCTRL R436
R430
nFE_RESET
R439
[Sheet18]
JTAG/EJTAG CIRCUIT
CN2
1
3
3V3IO
5
7
9
11
13
S5
3V3_VCC
C401
1u
100n
16V
16V
RST_OUT
7 8
U1
uPD61305F1
G21 AD0 F22
33R CBE0
G22 F23
33R AD1 6 CBE1
G25 E23
AD2 CBE2
G26 E24
AD3 CBE3 R425
E18 L21
33R AD4 DEVSELB 33R CEC
F18 C20
AD5 FRAMEB
E19 A23
AD6 GNTB0
F19 K22
AD7
33R GNTB1/ROM_DIR2
D20 J25
AD8 GNTB2/AO1_BD2 R437
E20 L24
33R
AD9 IDSEL CEC
F20 D22
AD10 INTAB
B21 J22
AD11 IRDYB/ROM_CI
C21 B20
AD12
PAR
D21 E22
AD13 PCICLK
E21 A24
AD14 PERRB R442
B23 A22
UART1_TXD
AD15 REQB0/TXD0B 33R
C23 K21
AD16 REQB1/ROM_DIR1
D23 H25
AD17
REQB2/AO1_BD1
B24 F21
AD18 SERRB
C24 H21
AD19 STOPB/ROM_PC
D24 H22
33R AD20 TRDYB/ROM_CI_PC
A25
33R AD21
C25
AD22
D25
AD23
E25
AD24
F24
AD25
F25
33R
AD26
F26
33R AD27
E26
33R AD28
D26
AD29
C26
AD30
B26
AD31
GPIOs
3V3IO
TP10
S19
JTRST
TP8
S11
2
JTDI
TP6
S18
4
JTDO
TP9
S4
6
JTMS
TP7
S10
8
JTCK
TP5
S17
10
nRESET
TP4
S20
12
NMI
14
17mb38-1
PROJECT NAME :
NEC TS-JTAG-RESET
SCH NAME : SHEET:
DRAWN BY :
28-01-2010_14:14
A3
16 19
OF: