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CP-530 Service Manual
・ Buffered mode DMA with a 16-byte data buffer.
・ Transfer type programmable for source and target buffer
(Byte, Half-word, Word, 4-Word burst).
・ Support for IO (non-incrementing addresses) source and/or destination.
・ Configurable throttle support with throttle sizes ranging from 16 to 112 bytes.
・ Integrated CRC Engine to perform CRC of MPEG section data as a post-process after the
section data has been collected into a memory queue.The CRCpolynomial is fixed and is
based on the 32-bit CRCdecoder model described in the Annex B of ISO/IEC 13818-1
specification.
Memory and bus interfaces
The pnx831x has two external buses:
・ 16-bit SDRAM memory interface which supports a scalable frequency up to 133 MHz.
(64 Mbit, 128 Mbit, 256 Mbit)
・ 16-bit memory and peripheral interface to connect ROM, NOR Flash and various
peripherals.
Peripheral interfaces
The pnx831x has many embedded peripheral units which have the following physical interfaces:
・ Two UART (RS-232) data ports: one with six wires for modem support and one with two wires
・ Two I2C master / slave transceivers, supporting the standard (100 Kbit/s) and fast (400 Kbit/s)
I2C bus modes.
・ Two smart-card reader interfaces sharing the same UART ISO-7816 compatible.
・ One Integrated Conditional Access Module interface (ICAM compliant) shared with a standard
smart-card interface.
・ Infrared receive and transmit interfaces (IR-capture & IR-blaster)
・ A general purpose port of up to 28bits available when the associated peripheral function is not
used in the application
・ One USB1.1 host controller
Interrupt interface
・ Sixteen external interrupt inputs shared with PIO lines.
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