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< 4- MT6323_DATA >
CHARGING IC
L30: T.I(EUSY0388501) , L20 : RICHTEK (EUSY0410801)
VBUS_USB_IN
VCHG_LDO_4V9
R4104 is changed ( 750 ohm --> 820 ohm, 12/26)
ISET Setting
560 ohm : 910mA
780 ohm : 680mA
820 ohm : 646mA
LGE Internal Use Only
Rev_0.1
R4103
11
+1V8_MTK_VIO
PGND
1
10
100K
VBAT
IN
BAT
2
9
ISET
_PG
3
U4101
8
VSS1
CHG
EXT_CHG_STAT
4
7
LDO
VSS2
5
6
IFULL
EN_SET
EXT_CHG_EN
IEOC Setting
3K ohm : 100mA
VREF_BAT_THERM
AUXADC_TSX
GND_AUXADC
Cap must to be close
Note 1
Cap must to be close
to PMIC AUXADC_AUXIN_GPS pin
ISENSE/BSTSNS 4mil
differential to Rsense
VBAT
P13
VCHG_LDO_4V9
BATSNS
SIM1_AP_SCLK
P12
ISENSE
SIMLS1_AP_SIO
K3
1%
BATON
SIM1_AP_SRST
BAT_ON
A12
330k
R4100
VCDT
M13
VDRV
SIM2_AP_SCLK
N13
R4101
CHRLDO
SIMLS2_AP_SIO
3.3K
SIM2_AP_SRST
A10
CHG_D_N
CHG_DM
1%
A11
CHG_D_P
CHG_DP
Close to PMIC
M2
PM_KYPD_PWR_N
PWRKEY
A1
WATCHDOG_RESET_OUT
SYSRSTB
K4
SYS_RESIN_N
RESETB
A9
FSOURCE
A7
PMIC_INT
INT
N12
EXT_PMIC_EN
N2
PMU_TESTMODE
A2
SRCLKEN
SR_CLK_EN
M1
U4100
FCHR_ENB
TP4100
D9
SPI_CLK
MT6323
PMIC_SPI_SCK
B7
SPI_CSN
PMIC_SPI_CS
D8
PMIC_SPI_MOSI
SPI_MOSI
B8
PMIC_SPI_MISO
SPI_MISO
C2
AUXADC_VREF18
B1
AUXADC_AUXIN_GPS
B2
AVSS28_AUXADC
C4106
C4107
Note 1
E2
0.1u
0.1u
HOOK_DETECT
ACCDET
E1
26M_AUDIO_CLK
CLK26M
D5
SLEEP_CLK_IN
RTC_32K1V8
C4
RTC_32K2V8
X4100
FC-135
A3
Note 2
XIN
Connect TSX/XTAL GND
1
2
32.768KHz
A4
to AUXADC_GND first
XOUT
than connect to main GND
C4108
C4109
Size is changed (12/26)
27p
22p
- 137 -
Size is changed (12/26)
B5
R4108
0
SIM1_CLK
M11
R4109
0
SIM1_DATA
E6
ERHZ0000401
R4108, R4109
C5
R4110
0
SIM2_CLK
K11
R4111
0
R4110, R4111
SIM2_DATA
D6
M9
SIMLS1_SCLK
SCLK1_PM
N11
SIMLS1_SIO
SDATA1_PM
M10
SIMLS1_SRST
SRST1_PM
K9
SIMLS2_SCLK
SCLK2_PM
L11
SIMLS2_SIO
SDATA2_PM
K10
SIMLS2_SRST
SRST2_PM
P1
VBAT
VBAT_SPK
L2
GND_SPK
C4101
2.2u
F2
AU_MICBIAS0
MIC_BIAS_1
G2
AU_MICBIAS1
MIC_BIAS_2
E4
C4110
0.1u
AU_VIN0_P
MIC_IN1_P
C4102
F4
C4111
0.1u
AU_VIN0_N
MIC_IN1_N
0.1u
G3
C4112
0.1u
AU_VIN1_P
MIC_IN2_P
G4
C4113
0.1u
AU_VIN1_N
MIC_IN2_N
D2
AU_VIN2_P
D1
AU_VIN2_N
If you use digital MIC, please change cap to 1.0uF.
K1
SPK_P
RCV_P
L1
SPK_N
RCV_N
Option 1
H1
Use the Option 1
AU_HSP
G1
SPK/RCV
MT6323(SPK_RCV_P/N)
AU_HSN
HP
MT6323(HPL/R)
H4
AU_HPL
HPH_L
J4
Option 2
AU_HPR
HPH_R
E7
SPK
MT6323(SPK_P/N)
AUD_MOSI
AUDIO_DATA_MOSI
E8
AUD_CLK
AUDIO_CLK
RCV
MT6323(HSP/N)
B6
AUD_MISO
AUDIO_DATA_MISO
HP
MT6323(HPL/R)
Copyright © 2014 LG Electronics. Inc. All right reserved.
6. CIRCUIT DIAGRAM
Single
Dual
Triple
ERHZ0000401
DNI
DNI
ERHZ0000401
DNI
Only for training and service purposes
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