SOYO SY-7IWB V1.0 User Manual page 68

BIOS Setup Utility
CHIPSET FEATURES SETUP
CHIPSET
FEATURES
SDRAM CAS
Latency Time
SDRAM Cycle
Time Tras/Trc
SDRAM RAS-to-
CAS Delay
System BIOS
Cacheable
Video BIOS
Cacheable
Memory Hole At
15M-16M
Delayed
Transaction
Spread Spectrum
Setting Description
2
Use the default setting
3
5/7
Use the default setting
6/8
3
Use the default setting
2
Disabled
Enabled The ROM area F0000H-
FFFFFH is cacheable.
Disabled
Enabled The video BIOS C0000H-
C7FFFH is cacheable.
Disabled
Enabled Some interface cards will map
their ROM address to this area.
If this occurs, select [Enabled]
in this field.
Enabled Use the default setting
Disabled
Enabled When using Spread Spectrum
Modulated 1.5% or 6% for
FCC or DOC testing.
64
SY-7IWB V1.0
Note
Default
Default
Default
Default
Default
Default
Default
Default