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5-12. SCHEMATIC DIAGRAM – MAIN Section (5/9) –
1
2
3
MAIN BOARD
A
A-GND
P_CONT_FL
M_ST
S-AIR
MAIN
20
BOARD
D3.3V
(7/9)
5V
(Page 39)
D-GND
OPT-IN
B
R506
100
IC502
IC502
TORX147L(SONY)
OPTICAL RECEIVER
1
3.3
IC502
VCC
2
0.1
TV
C504
OUT
0.1
DIGITAL IN
OPTICAL
3
GND
C
L-IN
MAIN
(Page 39)
21
BOARD
A-GND
(7/9)
R-IN
DZ710
CN505
21P
D
CL501
R509
MIC_DATA
1
CL502
R507
MIC_CLK
2
CL503
R508
RDS/MIC_DATA
3
R510
CL504
RDS/MIC_CLK
4
CL505
TUNED
5
CL506
ST_CLK
6
CL507
ST_DO
7
CL508
ST_CE
8
CL509
ST_DI
9
CL510
V_SEL0
10
E
CL511
IO
D
V_SEL1
11
BOARD
CL512
TV_SEL
CN4006
12
CL513
(Page 43)
A-SEL0
13
CL514
A-SEL1
14
CL515
A-SEL2
15
CL516
A12V
16
CL517
R-IN
17
CL518
A-GND
18
CL519
L-IN
19
A-GND
20
F
CL521
Eup
21
DZ330/DZ730
CN504
19P
RDS/MIC_DATA
1
RDS/MIC_CLK
2
TUNED
3
ST_CLK
4
ST_DO
5
ST_CE
6
ST_DI
7
G
V_SEL0
8
V_SEL1
9
IO
E
TV_SEL
10
BOARD
A-SEL0
CN4005
11
(Page 43)
A-SEL1
12
A-SEL2
13
A12V
14
R-IN
15
A-GND
16
L-IN
17
H
A-GND
18
Eup
19
I
J
HBD-DZ330/DZ710/DZ730
• See page 30 for waveform. • See page 67 for IC Pin Function Description of IC503.
4
5
6
(5/9)
L501
10uH
C505
100
10V
MIC_DATA
MIC_CLK
100
RDS_DATA
100
RDS_CLK
100
TUNED
100
ST_DO
ST_DI
R511
100X4
R512 100X4
ST_CLK
ST_CE
TV_SEL
R519 100X4
*1
R531
1.5k
(UK)
47k
(DZ710)
*2
R532
1.5k
(DZ710)
4.7k
(AEP)
47k
(UK)
*3
R535
1.5k
(DZ330)
47k
(DZ710/DZ730)
*4
R536
6.8k
(DZ710)
10k
(DZ730)
47k
(DZ330)
7
8
9
10
R548
R563
10k
10k
C554
47p
80
79
78
77
76
75
74
73
72
71
70
69
68
67
JL607
3.3
81 V_SEL0
JL608
3.3
82 V_SEL1
JL584
83 NO USE
JL609
3.3 < 0>
84 ASEL0
JL610
3.3 < 0>
85 ASEL1
3.3
JL611
86 ASEL2
JL585
87 reserved(ASEL)
JL586
88 NO USE
JL612
0
C509
89 reserved(Eup)
0.01
JL587
90 NO USE
A.CAL
R534
1k
JL501
0
R5F364AEDFA(for SERVICE)
91 A.CAL MIC LEVEL
SYSTEM CONTROL
CL526
CL528
3.2
92 DESTINATION
CL527
CL529
3.3
93 MODEL
R543
100
3.3
94 KEY2
R544
100
3.3
95 KEY1
KEY2
96 Vss
R540
100
3.3
97 KEY0
KEY1
3.3
MODEL SERIES
98 Vref
KEY0
C514
0.1
3.3
7
99 Vcc
R640
C515
0.1
3.3
100
100
R638
10k
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
R564
0
C519
0.1
37
37
11
12
13
DZ710
R574
0
C517
0.1
XIFCS
R591
10k
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
2.5
XIFBSY
50
3.3
IFSCK
49
IFSDO
0
48
0.5 < 3.3 >
IFSDI
47
R577
10k
3.3
46
CE
DVD_XIFBUSY
3.3
XSYSRST
45
MTK_RST
DVD_SCO
OCSW1SIG
0
44
CDM_OPEN_SW
DVD_SOD
43
NO USE
DVD_SID
0
JL594
IC503
42
DC_CONT
3.3
JL522
41
IC503
P_CONT_FL
40
reserved(NSP_MUTE)
JL524
3.3
39
P_CONT1
0
JL582
S-AIR_ADC_SEL
38
S-AIR_ADC_SEL
I2C_CLK/RXD1
JL583
S-AIR_RST
*
37
S-AIR_RST
I2C_DATA/TXD1
3.3
JL593
S-AIR_DET
36
S-AIR_DET
GPIO2
3.3
35
GPIO2
0
R592 10k
RST1
34
RTS1
CLK1
0
33
CLK1
3.3
RXD1
32
3.3
R579 4.7k
TXD1
31
R581
4.7k
R584
R583
R582
4.7k
4.7k
47k
JL529
Q501
2SC4154TP-1EF
3.3
RESET
0
X501
5MHz
JL530
R596
100k
HBD-DZ330/DZ710/DZ730
14
15
16
38
39
MAIN
22
BOARD
(6/9)
40
(Page 38)
BUS11
CN508
9P
CL555
1
D-GND
TXD1
R614
100
CL554
TXD1
2
RST1
R607
100
CL553
3
RTS1
CL552
3.3V
TO
4
CLK1
CL551
WRITE
5
CLK1
JIG
RXD1
CL550
R603
6
RXD1
100X4
CL549
CNVSS
7
CNVSS
RESET
CL548
8
RESET
D-GND
9
R585
10k
41
42
43
R599
10k
R597
JL531
47k
IC506
IC506
S-80935CNMC-G85T2G
RESET
C523
R598
0.22
47k
3.3
0
1
OUT
Cd
5
JL532
4.1
2
VDD
NC
3
GND
4
MAIN
23
BOARD
C524
(6/9)
0.01
C527
0.022
(Page 38)
44
BUS12
BUS13
45
46
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