Sony KDL-32W700B Service Manual page 134

Lcd digital color tv rb2g chassis segment: he-l
Hide thumbs Also See for KDL-32W700B:
Table of Contents

Advertisement

A BOARD SCHEMATIC DIAGRAM (4 OF 24)
1
2
3
SYSTEM(MAIN) (7001-7300)
A
B
Non Maskable Interrupt for software debug
+3.3V_MAIN
Internal pull up by STBY FW
R7001
XX
CL7001
NMI1
004:4F
Put CL near each other,
easy to short in A side.
CL7002
GND_D
+3.3V_MAIN
C
Internal pull up by STBY FW
R7002
XX
CL7003
NMI2
004:4F
Put CL near each other,
easy to short in A side.
CL7004
GND_D
D
005:15E
X_ARM_SRST
R7003
XX
009:8E
T_HTL_VOL_UP
009:8E
T_HTL_SP_MUTE
R7004
0
012:10G;018:3K;009:6I;015:6B
X_SYSTEM_RST
004:15D
DEBUG_LED3
002:4C;016:8E;016:8E;016:14B
PANEL_PWR
018:6I
PICTURE_MUTE_INT
005:14J
SC_LED_PWM_W
009:8E
T_HTL_VOL_DOWN
011:9G
DENEB_INT
E
012:10G
X_AUDIO_MON
004:15D
DEBUG_LED2
002:5C
LD_STBY
009:6E
CR_DET
012:13D
HP_DET
016:10E
PANEL_DET
004:3C
NMI1
004:3D
NMI2
005:3B
LED_PWM_R
005:14J
SC_LED_PWM_B
005:14J
SC_LED_PWM_G
HSYNC_MON
CL7006
For HW debug.
A-side
VSYNC_MON
CL7007
F
ACT_STBY is needed with 2 G-board model.
002:3B
ACT_STBY
018:3K
X_BROWNIE_RST
009:5E
LNB_CONT
009:5E
X_SHORT_DET
009:6E
PC_CON_DET
005:2H
UARTE_TX
VPC
005:2H
UARTE_RX
005:14I
SC_BT_CTS
009:6E
VIDEOB_DET
002:4C
JACK_DET
009:6E
VIDEOA_DET
G
013:5F
CI_OINT
018:6I
CCP_INT
H
2013/10/10 15:42
[ JIG ]
┌────────┬────────┬────────┐
│No
│Yes
├────────┼────────┼────────┤
│CN7001
│XX
│10P
├────────┼────────┼────────┤
│D7001
│XX
│SML-D13M8WT86S
├────────┼────────┼────────┤
│D7002
│XX
│SML-D13M8WT86S
├────────┼────────┼────────┤
│D7003
│XX
│SML-D13M8WT86S
├────────┼────────┼────────┤
│Q7001
│XX
│PDTC114EU
├────────┼────────┼────────┤
I
│Q7002
│XX
│PDTC114EU
├────────┼────────┼────────┤
│Q7003
│XX
│PDTC114EU
├────────┼────────┼────────┤
│R7048
│XX
│1.5k
│1/16W
│CHIP
├────────┼────────┼────────┤
│R7055
│XX
│1.5k
│1/16W
│CHIP
├────────┼────────┼────────┤
│R7056
│XX
│1.5k
│1/16W
│CHIP
├────────┼────────┼────────┤
│RB7003
│XX
│2.2k
├────────┼────────┼────────┤
│S7001
│XX
│169227021
└────────┴────────┴────────┘
J
K
L
2013/12/05
00:16
5004103813
RB2_BAX_L_PP3_041213.cir/004.sht
To PCB System
Chassis RB2G, HE-L
4
5
6
7
PU for I2CC is not needed (same as RB1)
C7003
C7007
C7011
C7015
C7019
C7023
C7027
C7031
C7035
PU for I2CD is not ready for ray-out reason
XX
XX
XX
XX
XX
XX
XX
XX
XX
C7001
C7005
C7009
C7013
C7017
C7021
C7025
C7029
C7033
XX
XX
XX
XX
XX
XX
XX
XX
XX
GND_D
PERI(Normal)
Internal PU
AC2
AK3
GPIO_0/IOEXB_CLK
I2CA_SDA
R7007
XX
Internal PD
AB3
AJ3
R7040
XX
GPIO_1/IOEXB_DATA/JTAG_SRST
I2CA_SCL
R7008
XX
Internal NO
R7041
XX
AC3
GPIO_2
R7009
XX
AE1
GPIO_3
006:8B
I2CB_SDA
R7010
0
R7042
XX
AE2
GPIO_4
006:8B
I2CB_SCL
R7011
0
Internal PD
AJ4
R7043
XX
GPIO_5
R7012
XX
Internal NO
AB2
E3
GPIO_6/PCDC_OUT/FE_CLKINB
I2CC_SDA
R7013
XX
Internal PU
AC1
E2
R7044
XX
GPIO_7/PCDD_OUT/FE_PWMA
I2CC_SCL
R7014
XX
Internal PD
R7045
XX
AH3
GPIO_8/PCDE_OUT/FE_CLKINA
1
2
R7015
XX
GPIO_9
AB4
1
2
GPIO_26/I2CD_SDA/UARTE_TX
R7016
XX
006:8B
R7046
XX
AA4
GPIO_10
GPIO_27/I2CD_SCL/UARTE_RX
1
2
006:8B
R7017
XX
R7047
0
GPIO_11
006:8B
R7018
XX
AA1
GPIO_12/TIMER_CMPD/SPDIF_SEL
R7019
XX
Internal PU
E1
1
2
GPIO_13/TIMER_CAPC/FE_WPMB/CK_EXT_PCD
R7020
XX
GPIO_14
006:8C
1
2
R7021
XX
GPIO_15
006:8C
1
2
R7022
XX
GPIO_16
006:8C
R7023
XX
AB1
GPIO_17/IOEXC_CLK/PCDA_OUT
R7024
XX
AE4
GPIO_18/IOEXC_DATA/PCDA_IN
R7025
XX
AA2
GPIO_19/IOEXC_LATCH
R7026
XX
For W-Audio debug
A3
GPIO_20/TIMER_CAPA/LVDS_HS
R7027
XX
GND_D
B4
GPIO_21/TIMER_CAPB/LVDS_VS
R7028
XX
D1
GPIO_22/DAMP_IC_SEL
GPIO_22/DAUIB_MCK/IOEXD_CLK/PCDB_OUT
R7029
XX
C1
GPIO_23/DAUIB_LRCK/IOEXD_DATA/PCDB_IN
GPIO 28:USB_PEN_0
R7030
XX
D2
GPIO 29:USB_OVCD_0
GPIO_24/DAUIB_BCK/IOEXD_LATCH
GPIO 30:USB_PEN_1
R7031
XX
GPIO 31:USB_OVCD_1
D3
1
2
GND_D
GPIO_25/DAUIB_DAT
GPIO 32:PANEL_CTRL
R7032
XX
GPIO 33:PANEL_CTRL
GPIO_35
006:8C
GPIO 34:PANEL_CTRL
R7033
XX
B5
GPIO_38/UART_D_TX/UARTE_TX
GPIO 36:MS_PON
R7034
XX
A5
GPIO 37:MS_INS_X
UART_RX
Select:InternalPU
GPIO_39/UART_D_RX/UARTE_RX
1
2
R7035
XX
GPIO 40:PANEL_CTRL
GPIO_44
006:8C
GPIO 41:PANEL_CTRL
R7036
XX
AD2
GPIO 42:PANEL_CTRL
GPIO_45/FE_PWMC
GPIO 43:PANEL_CTRL
R7037
XX
CL7013
D5
GPIO_46/FE_CLKINC
GPIO 48:DAUOA_DAT_1
R7038
XX
AA3
GPIO 49:DAUOA_DAT_2
GPIO_47/DAUI_SPDIF_0
GPIO 50:DAUO_SPDIF_1
R7039
0
GPIO 51:LED_MUTE
GPIO 52:TSIO_CK
Internal PD
AK4
GPIO 53:TSIO_EN
GPIO_63
GPIO 54:TSIO_STRT
R7005
XX
Internal PD
GPIO 55:TSIO_DAT0
AH4
GPIO_64
GPIO 56:TSIO_DAT1
R7006
XX
GPIO 57:TSIO_DAT2
GPIO 58:TSIO_DAT3
GPIO 59:TSIO_DAT4
GPIO 60:TSIO_DAT5
GPIO 61:TSIO_DAT6
GPIO 62:TSIO_DAT7
*IC9000
CXD4748GB
C7002
C7006
C7010
C7014
C7018
C7022
C7026
C7030
C7034
XX
XX
XX
XX
XX
XX
XX
XX
XX
2013/10/10 15:42
C7004
C7008
C7012
C7016
C7020
C7024
C7028
C7032
┌────────┬────────┬────────┐
[ SOC ]
XX
XX
XX
XX
XX
XX
XX
XX
GND_D
│60
│60AVS
├────────┼────────┼────────┤
│IC9000
│CXD4748GB
│CXD4748GB-1
└────────┴────────┴────────┘
2013/10/10 15:42
[ DAMP ]
┌────────┬────────┬────────┐
│IC YDA178-SZE2
│IC YDA179-SZE2
├────────┼────────┼────────┤
│R7057
│0
│XX
│CHIP
└────────┴────────┴────────┘
8
9
10
11
12
Temp sensor
B-side mount
+3.3V_MAIN
Temp Sensor
+3.3V_MAIN
6
5
4
IC7001
Compatible
MM3285FNRE
C7044
0.1
16V
X7R
7
5
3
1
7
5
3
1
1
2
3
8
6
4
2
8
6
4
2
GND_D
For W-Audio debug
I2CA_SDA
011:9G
CL7009
HDMI_EQ, TEMP_Sensor
I2CA_SCL
011:9G
CL7010
I2CB_SDA
018:6F;009:6I
TUNER
I2CB_SCL
018:6E;009:6I
I2CC_SDA
016:9D
Panel
I2CC_SCL
016:9E
X_CAMERA_RST
004:12E
004:11E
X_CAMERA_RST
CL7011
X_MIC_RST
004:12E
004:11E
X_MIC_RST
CL7012
C7036
C7037
C7038
C7039
C7040
C7041
C7042
C7043
XX
XX
XX
XX
XX
XX
XX
XX
13
14
15
16
MODEL MATRIX for factory
JL7002
R7049
XX
JL7003
R7050
XX
JL7004
R7051
XX
JL7005
R7052
XX
JL7006
R7053
XX
JL7001
JL7007
R7054
XX
GND_D
B side
STBY_+3.3V
*R7048
*R7055
*R7056
XX
XX
XX
DEBUG LED
JIG setting
*D7001
*D7002
*D7003
005:9B
DEBUG_LED1
004:4E
DEBUG_LED2
XX
*Q7003
004:4E
DEBUG_LED3
XX
*Q7002
XX
*Q7001
GND_D
+3.3V_MAIN
ICC SEL Strap Setting
*** Strap Setting ***
DAUOA_LRCK = STRAP_G[3](InternalPD)
DAUOC_LRCK = STRAP_G[6](InternalPD)
DAUOA_BCK
= STRAP_G[4](InternalPD)
DAUOC_BCK
= STRAP_G[7](InternalPD)
JTAG Select
MeP E-JTAG Select
■ 00:STBY CPU (default)
■ 00:Disable (default)
□ 01:MAIN CPU
□ 01:ICC
□ 10:VPC CPU
□ 10:LD
JIG setting
□ 11:Reserved
□ 11:Reserved
1
3
5
7
2
4
6
8
DAUOC_BCK_CLK
018:6F;018:13G
DAUOC_LRCK_CLK
018:6F;018:13G
DAUOA_BCK_CLK
012:7G;012:9G
DAUOA_LRCK_CLK
012:7G;012:9G
MS
+3.3V_MAIN
JL7009
10
VCC
9
VCC
JL7010
MS_SCK
8
MS_SCK
JL7011
7
GND
JL7012
MS_DATA
6
MS_DATA
JL7013
JIG setting
5
GND
JL7014
MS_BS
4
MS_BS
JL7015
MS_INS_X
3
MS_INS
JL7016
018:13J
MS_PON
2
MS_PON
1
GND
*CN7001
XX
Up date MS connector
GND_D
ORIGINAL
MODEL
BAX_L BOARD
DESCRIPTION
SYSTEM(MAIN)
PART NO.
SHEET
RB2
ALL resistors are in ohms,W unless otherwise noted.
4/18
ALL capacitors are in uF(p;pF)unless otherwise noted.
Chassis RB2G, HE-L
134

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents