Clock Distribution; Rfclk (19.2Mhz Analog) - Nokia 6255 Description And Troubleshooting

6255/6255i6256/6256i (RM-19)
Baseband Description and Troubleshooting

Clock Distribution

RFClk (19.2MHz Analog)

The main clock signal for the baseband is generated from the voltage-controlled
temperature-controlled crystal oscillator (VCTCXO). This 19.2MHz clock signal is
generated by the radio frequency circuitry and fed to the radio frequency clock (RFCLK)
pin of the D2800 processor. The 19.2MHz clock can be stopped during sleep mode by
disabling the UEME regulator output (VR3), which in turn powers off the VCTCXO.
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Figure 4: Waveform of the 19.2MHz clock (VCTCXO)
©2005 Nokia Corporation
Nokia Customer Care
Company Confidential Issue 2 05/2005