LG KF700Q Service Manual page 56

3.10.5 Camera Interface
KF700Q Installed a 3M Pixel and 0.3Mega Camera. Below [Fig. 3.20] shows the camera board to
board connector and camera I/F signal.
CLKN
CLKP
DATAN
DATAP
XSHUTDOWN
ISP_SENS_I2C_SCL
ISP_SENS_I2C_SDA
The MEGA Camera module is connected to Main PCB with 20pin Board to Board connector Its
interface is dedicated camera interface port in ISP chip. The camera port supply 24.576MHz master
clock to camera module, vertical sync signal, horizontal sync signal, reset signal and 8bits data from
camera module. The camera module is controlled by I2C port from ISP chip.
The VGA Camera module is connected to FPCB with 20pin Board to Board connector (AXK720147G).
Its interface is dedicated camera interface port in MSM6280. The camera port supply 24.576MHz
master clock to camera module and receive 24.576MHz pixel clock (30fps), vertical sync signal,
horizontal sync signal, reset signal and 8bits data from camera module. The camera module is
controlled by I2C port from MSM6280.
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Only for training and service purposes
CN103
G1 G2
1 20
2 19
ISP_SENS_MCLK
3 18
FB104
4 17
5 16
6 15
7 14
FB103
8 13
9 12
10 11
G3 G4
LC Filter for power noise from GSM RF
AXK7L20227G
D101
PRSB6.8C
VREG_CAM_2.8V
CN101
1 20
VGA_CAM_PWDN
2 19
CAM_MCLK
3 18
4 17
CAM_PCLK
5 16
CAM_DATA(0)
6 15
CAM_DATA(1)
7 14
CAM_DATA(2)
8 13
CAM_DATA(3)
9 12
CAM_DATA(4)
10 11
CAM_DATA(5)
VGA CAMERA CONNECTOR
MAGNACHIPS
[Fig. 3.20] Camera PCB Board to Board Connector
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3. TECHNICAL BRIEF
VREG_CAM_1.8V
VREG_CAM_2.8V
VREG_3M_AF_2.8V
C113 C114
0.1u 0.1u
FB100
BLM15AG100PN1
C121
2.2u
FB101
L101 47nH
C126
220p
VREG_CAM_1.8V
Rev_1.0
C105 C106
FB1 FB2
04/14
0.1u 0.1u
VGA_CAM_RESET_N
I2C_SCL
I2C_SDA
CAM_HSYNC
CAM_VSYNC
CAM_DATA(7)
CAM_DATA(6)
LGE Internal Use Only