Biostar K8M800 Micro AM2 Bios Setup Manual page 23

K8M800 Micro AM2 BIOS Setup
PCI1 Post Write
When enabled, writes to the PCI bus are executed with zero-wait states.
The Choices: Enabled (default), Disabled.
PCI2 Post Write
When enabled, writes to the PCI bus are executed with zero-wait states.
The Choices: Enabled (default), Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles.
Select Enabled to support compliance with PCI specification.
The Choices: Enabled (default), Disabled.
Memory Hole
You can reserve this area of system memory for ISA adapter ROM. When this area is
reserved it cannot be cached. The user information of peripherals that need to use this area
of system memory usually discussed their memory requirements.
The Choices: Disabled (default), 15M –16M.
Vlink Date Rate
The Choices: 8X (default), 4X
Init Display First
With systems that have multiple video cards, this option determines whether the
primary display uses a PCI Slot or an AGP Slot.
The Choices: PCI Slot (default), AGP.
System BIOS Cacheable
Selecting the "Enabled" option allows caching of the system BIOS ROM at
F0000h-FFFFFh which can improve system performance. However, any programs writing
to this area of memory will cause conflicts and result in system errors.
The Choices: Enabled, Disabled (default).
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