Dbus Clk Interface - Nokia RM-11 Series Troubleshooting Manual

CC Technical Documentation

DBUS Clk Interface

A 9.6 MHz clock signal is used for DBUS, which is used by the DSP to transfer data
between the UEM and UPP.
The system clock can be stopped during sleep mode by disabling the VCTCXO power
supply from the UEM regulator output (VR3) and turning off the controlled output signal
SleepX from the UPP.
Issue 2 09/2005
Figure 6: DBUS data transfer
©2005 Nokia Corporation
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