Block Diagram - Sony WRR-862A Service Manual

Section 6

Block Diagram

Circuit Description
The WRR-862A/862B is composed of the following circuit
blocks.
RX-60/74 board
1. RF block
RF amplifier circuit
The RF signal is input separately to antennas A and B of
both tuners 1 and 2.
4 bandpass filters (FL101 and 102 for antenna A of both tun-
er 1 and 2, FL 401 and 402 for antenna B of both tuner 1 and
2) select the desired frequency bandwidth for the RF input
signal.
The RF signal is amplified by RF amplifier (IC101 for an-
tenna A of both tuner 1 and 2, IC 401 for antenna B of both
tuner 1 and 2), and divided for two tuners.
The divided RF signal is compensated for distribution loss
by the RF amplifier (IC111 for antenna A of tuner 1, IC211
for antenna B of tuner 1, IC311 for antenna A of tuner 2,
IC411 for antenna B of tuner 2), then once more filtered
(FL111 for antenna A of tuner 1, FL211 for antenna B of
tuner 1, FL311 for antenna A of tuner 2, FL411 for antenna
B of tuner 2).
The Gain of the RF amplifier stage, including the loss
caused by the bandpass filters and LC distributors, is about
10 dB.
1st mixer and 1st IF amplifier circuit
The RF signal amplified as above is mixed with the 1st local
oscillation signal in the 1st mixer (IC131 for antenna A of
tuner 1, IC231 for antenna B of tuner 1, IC331 for antenna A
of tuner 2, IC431 for antenna B of tuner 2), and the mixer
outputs the 1st IF signal.
The frequency conversion is carried out as shown in the
equation below.
1st IF frequency = 1st local oscillation frequency _ RF input
frequency
1st IF frequency of WRR-862A/-862B is 150.75 MHz.
SAW filter (SWF131 for antenna A of tuner 1, SWF231 for
antenna B of tuner 1, SWF331 for antenna A of tuner 2,
SWF431 for antenna B of tuner 2) selects the desired fre-
quency bandwidth for the 1st IF signal.
WRR-862A/862B
1st local signal oscillator circuit
The 1st local oscillation signal is generated by the VCO
(OSC531 for tuner1, OSC581 for tuner 2), and distributed
for two antenna inputs, then buffered by FETs (Q121 for
antenna A of tuner 1, Q221 for antenna B of tuner 1, Q321
for antenna A of tuner 2, Q421 for antenna B of tuner 2).
The VCO is controlled by the PLL IC (IC511 for tuner 1,
IC561 for tuner 2) and the CPU IC (IC1301 for tuner 2,
IC1401 for tuner 2) on the AU-276 board.
2nd mixer and 2nd IF circuit
The 1st IF signal is mixed with the 2nd local oscillation sig-
nal in the 2nd mixer (Q151 and 152 for antenna A of tuner 1,
Q251 and 252 for antenna B of tuner 1, Q351 and 352 for
antenna A of tuner 2, Q451 and 452 for antenna B of tuner
2), and the mixer outputs the 2nd IF signal.
The frequency conversion is carried out as shown in the
equation below.
2nd IF frequency = 1st IF frequency _ 2nd local oscillation
frequency
2nd IF frequency is 10.7 MHz.
Ceramic filters (CF151,171 and 181 for antenna A of tuner
1, CF251,271 and 281 for antenna B of tuner 1,
CF351,371,381 for antenna A of tuner 2, CF451,471 and
481 for antenna B of tuner 2) select the desired frequency
bandwidth for the 2nd IF signal.
2nd local signal oscillator circuit
The 2nd local oscillation signal is generated by crystal oscil-
lator unit (X541) and divided into four then buffered by
FETs (Q141 for antenna A of tuner 1, Q241 for antenna B of
tuner 1, Q341 for antenna A of tuner 2, Q441 for antenna B
of tuner 2).
2nd IF circuit
The 2nd IF signal is amplified by the transistor (Q171 for
antenna A of tuner 1, Q271 for antenna B of tuner 1, Q371
for antenna A of tuner 2, Q471 for antenna B of tuner 2) and
IC (IC181 for antenna A of tuner 1, IC281 for antenna B of
tuner 1, IC381 for antenna A of tuner 2, IC481 for antenna B
of tuner 2). Ceramic filters (CF151,171 and 181 for antenna
A of tuner 1, CF251,271 and 281 for antenna B of tuner 1,
CF351,371 and 381 for antenna A of tuner 2, CF451, 471
and 481 for antenna B of tuner 2) select the desired frequen-
cy bandwidth for the 2nd IF signal.
The 2nd IF signal amplified as above is detected by the IC
(IC191 for antenna A of tuner 1, IC221 for antenna B of
tuner 1, IC391 for antenna A of tuner 2, IC491 for antenna B
of tuner 2) with ceramic discriminator (CF191 for antenna A
of tuner 1, CF291 for antenna B of tuner 1, CF391 for anten-
na A of tuner 2, CF191 for antenna B of tuner 2) to be output
as an audio signal.
The 2nd IF amplifier IC also outputs the RSSI signal, which
is DC voltage level that changes according to the change in
the RF input level.
2. AF block
The audio signal is amplified by operational amplifier IC
(IC601 for tuner 1, IC701 for tuner 2), and is input to the
diversity circuit (IC621 for tuner 1, IC721 for tuner 2).
The diversity circuit is controlled by the CPU (IC1301 for
tuner 1, IC1402 for tuner 2) on the AU-276 board according
to the RSSI signal generated by 2nd IF IC (IC181 for anten-
na A of tuner 1, IC281 for antenna B of tuner 1, IC381 for
antenna A of tuner 2, IC481 for antenna B of tuner 2).
The audio signal output from the diversity circuit is divided
and one is input to the squelch (muting) circuit, and the other
is input to the detector circuits on the AU-276 board. The
squelch circuit (IC631 for tuner 1, IC731 for tuner 2) is also
controlled by the CPU using the RSSI.
The audio signal output from the squelch (muting) circuit is
applied to the de-emphasis circuit whose time constant is 50
micro second, and the low pass filter circuit whose cut off
frequency is 25 kHz (IC641 for tuner 1, IC741 for tuner 2),
and the expander circuit (IC671 for tuner 1, IC771 for tuner
2).
The expander includes weighting circuit whose time con-
stant is 330 micro second (IC661 for tuner 1 IC771 for tuner
2). Then it is output to the audio the AU-276 board.
3. Power supply block
Battery detection circuit
If a battery voltage is detected by the voltage-detection IC
(IC851) when the Power switch is set to ON, the FET
switches (Q853 and Q855) are set to ON, and the battery
voltage is fed to the DC-DC converter circuit.
External power detection circuit
If an external supply voltage is detected by the voltage-de-
tection IC (IC801) when the Power switch is set to ON, the
FET switches (Q802 and Q804) are set to ON, and the exter-
nal supply voltage is fed to the DC-DC converter circuit.
6-1 6-1
Stepdown DC-DC converter circuit
The battery voltage or external voltage (input voltage range:
3.6-17 V) fed from the detection circuitis stepped down to
3.3 V by the control IC (IC901) and the Switching FET
(Q901).
Inverted DC-DC converter circuit
The voltage of most circuits of the WRR-862A/862B is
+3.2 V, but that of the audio circuit is ± 3.2 V. Negative
voltage of _3.2 V is made from the output of the Stepdown
DC-DC converter by the control IC (IC951) and the switch-
ing transistor (Q951).
Positive voltage power switch circuit
In the positive-and-negative-voltage power circuit, to avoid
latch-up of the IC being used, it is necessary to delay the
startup of the positive-voltage power in relation to the start-
up of the negative-voltage power. The startup of the posi-
tive-voltage power is therefore delayed by the voltage-de-
tection IC (IC902) and the switching FET (Q903) before
being fed to the circuit.
AU-276/285 board
1. AF block
There are two signal paths for the audio signal from the RX-
60 board. One is connected to the main signal path and the
other is connected to the detector circuits (except the AF lev-
el detector) through the buffer amplifier (IC1011 for tuner 1,
IC1111 for tuner 2). The output from the detector is applied
to the CPU (IC1301 for tuner 1, IC1401 for tuner 2) on the
AU-276 board, and is used to control the squelch (muting)
circuit.
Main audio signal path
The audio signal output from the RX-60 board is converted
to balanced output signal using the transformer (T1001 for
tuner 1, T1101 for tuner 2).
Transistor (Q1001 for tuner 1, Q1101 for tuner 2) is used to
mute the output when power on or off.
Monitor signal path
Two (tuner 1 and 2) audio signals branched from the main
audio signal path are buffered (IC1041 for tuner 1, IC1141
for tuner 2), selected (S1201), mixed (IC1201) and applied
to the monitor amplifier (IC1251) via the level control
(RV1211), and is sent to the headphones connector.