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4-1. BLOCK DIAGRAM — RF SECTION —
ANTENNA
POWER
CONTROL
Q601
SW601
(ANT+B)
ACC9V
POWER
CONTROL
Q602,603
CN601
POWER
ANT REM
1
RX/DATA
4
TX/CK
3
BATT
BATT
5
BATT
7
CLK
HRST
4
1
DATA
SYS RST
5
2
BUSON
SIRCS
6
3
8
7
CLK
HRST
4
1
SYS
DATA
RST
5
2
SIRCS
6
3
8
BUS ON
CN603
SONY BUS CONTROL
OUT
LINK OFF
Q611
BU5V
04
• Signal path
: FM
SECTION 4
DIAGRAMS
TUNER UNIT
Q101
SAW
TU101
IF OUT
FILTER
RF IN
11
SWF101
1
3
4
10 5 6 7 2 9
Q103
AGC
Q102,105
Q109-111
D602
8
RV102
DC/DC
AGC
4
1
CONV.
6
IC602
Q104
AGC
5
THRESHOLD
SWITCH
BATT
IC102
SYSTEM CONTROL
IC401 (1/2)
119
DAB BAND
CN602
118 DAB SEK OUT
SONY BUS CONTROL
112 AGC WATCH
IN
1 DAB LOCK IN
121 I2CSO
122 I2CCKO
120
ANTREM
9
60
SO
6
10
62
SI
4
11
64
CKI
BUS INTERFACE
IC606
RESET
7
SW
8
2
SW
13
38
BUSON
12
SW
1
RESET
DELAY
81
SYS RST
IC605
IC609,610
94
LNK OFF
– 7 –
Q108(1/2)
Q108(2/2)
A/D CONVERTER
IC206
IF
IF
BPF
21
24
8
VIN
IN
OUT
T101
IF SIGNAL
PROCESSING
CLK
IC101
12
X2
12
LO IN
ENV.
9
AGCPRE
3
DET.
2
Q106,107
THRRPRE
RV103
AGC
RV104
THR
FLAME SYNC
7
16
RV101
OSC
XO201
IF2 OUTPUT
GAIN
24.576MHz
1
OSC
7
XO101
17.92MHz
BUS INTERFACE
IC607
EXT SI 98
6
2
3
5
3
1
7
ERR
96
BUS INTERFACE
XFLASH
IC608
1
7
IC204
8
EXT SO
97
2
6
3
5
UNI
CTL
102
63
CKO
MBUS
SO
59
SI
61
XVFICID
37
MPEGHREQ
32
MPEGREQ
33
MREQ
34
HR FLG
107
D611
IC612
BATT
DET
BU IN
105
BATT
4
2
Q608
SWITCHING
Q613
BATT
1
REG
SLAVE ON
116
5
IC603
4
9V REG
1
2
ACC9V
BATT
IC601
4
POWER AON
117
POWER DON
115
IC303
2
4
8
DACO
2
ADIN
D0-7
0-7
LRCKO
4
BCKO
5
DATO
6
25
XRST
155
ADCK
TRST
51
COMP.
4
136
FR SYNC
IC103
1
IC207
122
XTLI
2
4
92
ETTCXO
134
VCXI
3
125
PWMP0
LPF
IC202
5
127
PWMP1
DAB BASEBAND
DECODER
IC201
3V TO 5V
CONV.
2
184
ADAT
IC204
IC205
187
ACTL
4
2
186
AVLD
181
ACLK
203
SCTL
204
SCLK
205
SDIN
207
SDOT
190
VFICID
72
TD88
85
TD89
5V REG
15
MRREQ
BATT
Q609,610
9
HFRT
OPT5V
POWER
3.3V REG
2
CONTROL
1
IC604
Q606,607
5V REG
1
2
TU5V
5V REG
IC611
ACC 9V
3
IC500
4
– 8 –
XT-100DAB
MCK
LRCK
1
BCK
DATA
AUDIO
SECTION
DAB RST
BU5V
VDD5V
2
VDD3.3V
1
DA5V
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