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CMT-Z100DiR/Z100iR
IC380 TPA3100D2PHPR
48 47
46
45
AVCC
4V
REGULATOR
VREG
GND 1
VBYP
RINN 2
–
GAIN
+
–
CONTROL
RINP 3
+
AGND 4
VBYP
LINP 5
+
–
GAIN
+
LINN 6
CONTROL
–
GAIN0 7
TO GAIN
8
GAIN0 8
GAIN
ADJUSTMENT
CONTROL
GAIN1 9
BLOCKS &
STARTUP LOGIC
MSTR/SLV 10
GENERATOR
SYNC 11
GND 12
13
14
38
44
VBYP AVCC
BIASES
STARTUP
&
PROTECTION
REFERENCE
LOGIC
TLL INPUT
BUFFER
(VCC COMPLIANT)
TLL INPUT
BUFFER
(VCC COMPLIANT)
–
+
–
+
+
–
+
–
RAMP
VBYP
15
16
17
43
SC DETECT
THERMAL
VREG
VREGOK
AVCC
VCCOK
GAIN
GAIN
VCLAMP
GENERATOR
+
GATE
DRIVE
–
PWM
LOGIC
+
–
GATE
DRIVE
+
GATE
DRIVE
–
PWM
LOGIC
+
–
VCLAMP
GENERATOR
GATE
DRIVE
GAIN
GAIN
18
42
41
40
39
38
37
19 20
21
22
23
24
36
GND
35
PVCCR
34
PVCCR
33
PGNDR
32
PGNDR
31
VCLAMPR
30
VCLAMPL
29
PGNDL
28
PGNDL
27
PVCCL
26
PVCCL
25
GND
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