Buffer Memory Area - Mitsubishi Electric MELSEC-Q Series User Manual

4.2

Buffer Memory Area

This area is for data communication between the master module and CPU module.
Buffer memory address
*1
100 to 13F
H H
*1
1100 to 113F
H H
2000
H
2001 to 2080
H H
*2
2400
H
*2
2401 to 2480
H H
*2
2810
H
*2
2811
H
*1 The buffer memory address occupies a 64-word sized area, irrespective of the number of I/O points set in the "Switch 1"
setting on Page 28, Section 3.1.2.
*2 The QJ51AW12D2 with a serial number where the sixth digit is "6" or later can be used.
Ex. Correspondence between the buffer memory address and AnyWire DB A20 input address
Buffer memory address
100
H
101
H
Input (1024 points): The least significant bit of 100
significant bit of 13F is the 1023rd data.
H
Output (1024 points): The least significant bit of 1100
significant bit of 113F is the 1023rd data.
H
Number of error IDs (1 word)
Error ID information
Number of connection IDs (1 word)
Connection ID information
Latest error code storage area
Latest error ID storage area
Bit No.
15 14 13 12 11 10
15 14 13 12 11 10
31 30 29 28 27 26
CHAPTER 4 PROGRAMMING
Description
is the 0th data, and the most
H
is the 0th data, and the most
H
9 8 7 6 5 4
9 8 7 6 5 4
25 24 23 22 21 20
AnyWire input address: 0
4
3 2 1 0
3 2 1 0
19 18 17 16
43