Sony XDP-PK1000 Service Manual page 27

Digital link sound system
Hide thumbs Also See for XDP-PK1000:
Table of Contents

Advertisement

DSP BOARD IC703 92FD28AFG7F88 (SYJZ) (iPod/iPhone CONTROLLER)
Pin No.
Pin Name
1
RESET
2
BU_IN
3
PWR_INFO
4
WAKEUP
5
DEC_REQ
6
DVCC3B
7
XT1
8
XT2
9
PWE
10
DVSS
11
DVCC1B
12
RVOUT1
13, 14
RVIN
15
RVOUT2
16
DVCC1A
17
DVSS
CD_BUS0 to
18 to 21
CD_BUS3
22
CD_BUCK
23
CD_XCCE
24
CD_XRST
25
ZDET
26
DVSS
27
DVCC3A
28
DEC_SSTBY
29
DEC_INT
30
DEC_XMUTE
31
DEC_GATE
32
NCO
33
CDON_1500MV
34
CPON
35
NCO
36 to 39
LED_0 to LED_3
40 to 43
NCO
44
DVSS
45
DVCC3A
46
EJECT_OK
47
OPEN_REQ
48
A-ATT
49
NCO
50
CDON
51
ZMUTE
52
NCO
53
CDON_CHECK
54 to 61
NCO
62
DVSS
63
DVCC3A
64 to 68
NCO
69
BOOT
70, 71
NCO
72
AM1
73
X2
74
DVSS
75
X1
76
DVCC3A
77
NCO
I/O
System reset signal input from the reset signal generator, system controller and RESET switch
I
"L": reset
For several hundreds msec. after the power supply rises, "L" is input, then it change to "H"
I
Back-up power on/off detection signal input terminal
I
System power on/off status information signal input system controller
I
Wake-up signal input from the system controller
I
Request signal input from the digital signal processor
-
Power supply terminal (+3.3V)
I
Sub system clock signal input terminal
O
Sub system clock signal output terminal
O
External power control signal output terminal
-
Ground terminal
-
Power supply terminal (+3.3V)
O
Internal regulator (+1.5V) output terminal
-
Power supply terminal (+3.3V)
O
Internal regulator (+1.5V) output terminal
-
Power supply terminal (+3.3V)
-
Ground terminal
I/O
Bus data input/output with the digital signal processor
O
Bus clock signal output to the digital signal processor
O
Chip enable signal output to the digital signal processor
O
Reset signal output to the digital signal processor
I
Zero detection signal input from the digital signal processor
-
Ground terminal
-
Power supply terminal (+3.3V)
O
SRAM standby mode control signal output to the digital signal processor
I
Request signal input from the digital signal processor
O
Muting on/off control signal output to the digital signal processor
O
Gate signal output to the digital signal processor
O
Not used
O
Servo power supply on/off control signal output terminal
O
EEPROM power supply on/off control signal output terminal
O
Not used
O
LED drive signal output terminal
O
Not used
-
Ground terminal
-
Power supply terminal (+3.3V)
O
Not used
O
Not used
O
Audio muting on/off control signal output terminal
O
Not used
O
Servo power on/off control signal output to the digital signal processor
Zero detection muting on/off control signal output to the digital signal processor
O
"H": muting on
O
Not used
I
+3.3V power supply on/off detection signal input terminal
O
Not used
-
Ground terminal
-
Power supply terminal (+3.3V)
O
Not used
I
Single boot mode setting signal input terminal
O
Not used
I
CPU operation mode setting signal input terminal
O
Main system clock (9 MHz) output terminal
-
Ground terminal
I
Main system clock (9 MHz) input terminal
-
Power supply terminal (+3.3V)
O
Not used
Description
"H": power on
"H": wake-up
Not used
Not used
Not used
Connected the power supply (+3.3V) in this unit
Connected the power supply (+3.3V) in this unit
"L": reset
"H": power on
"H": power on
Not used
"H": muting on
"H": power on
Fixed at "H" in this unit
Fixed at "H" in this unit
XDP-PK1000
"H": power on
"L": standby mode
"H": muting on
"H": power on
27

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Xa-c100ipXdp-mu100

Table of Contents