Ibm 7606 Multiplexor; Multiplexor Functional Units; Multiplexor Clock - IBM 7090 Instruction-Reference

4. O. 00 IBM 7606 MULTIPLEXOR
The IBM 7607 Multiplexor is best described as the unit of the 7090 system that passes
all data to or from core storage. These data may be CPU instructions, data channel
commands, data to be processed by the CPU, data that has been processed by the CPU,
or input-output words. Data that go to core storage come to the multiplexor from the
CPU and data channels.
Multiplexing is the forming of parallel paths from a serial path when data are going
to core storage. When data are coming from core storage, multiplexing is the forming
of a serial path from parallel paths.
In addition to its function of multiplexing, the multiplexor contains the clock for the
CPU and data channels, and a matrix for zero testing data coming from core storage.
The multiplexor also contains look-ahead circuits that are used in conjunction with the
data channel operations. The CPU clock and CPU multiplexing circuits are described
in this manual; the remainder of multiplexor functions are described in Customer
Engineering Manual of Instruction, IBM 7607 Data Channel, Form 223-6898.
Two of the four standard modular system (SMS) sliding gates in the multiplexor
frame are reserved for special features. The remaining two SMS sliding gates house
the multiplexor circuitry.
Data flow from core storage to the multiplexor storage bus, then to either the CPU
or anyone of the data channels. See Figure 4.0-1. The address field (21-35) of the
data coming from core storage also flows to the multiplexor address switches. The
flow through the multiplexor address switches is controlled by the look-ahead circuits
in the multiplexor.
Data going to core storage flow through the multiplexor storage bus OR'ing. This
bus is a group of OR circuits that multiplex data going to core storage.
It
is completely
independent of the multiplexor storage bus.
The multiplexor address switches receive addresses from the CPU, data channels,
and the multiplexor storage bus. These switches multiplex the address sent to core
storage and the location counter switches in each data channel.
4.1. 00 MULTIPLEXOR FUNCTIONAL UNITS
The multiplexor contains the multiplexor clock, storage bus, storage bus OR 'ing,
and the address switches.
4.1. 01 Multiplexor Clock
The multiplexor clock (Figure 4. 1-1) supplies timing pulses to the 7090 system. The
clock consists of a 12-stage ring. The clock is started by turning on the zero clock
trigger with a start clock pulse. The AO(Dl) clock pulse is obtained by gating the last
half of the zero clock trigger pulse with the negative portion of the even ring drive pUlse.
The rise of the AO(Dl) pulse turns on one clock trigger. The Al(Dl) pulse is obtained
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