Tag Registers; Adders (Ad) - IBM 7090 Instruction-Reference

presets trigger A of PC 15 through the + AND circuit at 4H on Systems 03. 05. 06. 1. This
+AND circuit corresponds to the preset AND circuit at 4H in Figure 3. 1-9B. At this
point, both triggers of PC 17 are turned off, trigger A of PC 16 is on, and trigger B is
preset. Trigger A of PC15 is also preset.
With the "next step PC17 ," position 17 will turn on in the same manner as before.
The different positions will turn on and off as the PC counts up. Figure 3. 1-9A is a
timing chart showing the stepping of the PC with six pulses. The solid lines indicate
the actual condition of a trigger; the dotted lines, a preset condition.
The PC is divided into groups of three, with the outputs of the different groups used,
as a lookahead circuit. Each of these groups of three acts like positions 15, 16, and
17, just discussed; however, they will not be stepped as often.
3.1. 09 Address Register (AR) (Systems 3.06.00.1-3.06.04.1)
The address register is a 15-position register whose positions are labeled (3-17).
The address register gets the desired core storage address before a word is brought
out of core storage. The address goes from the address register to the address selec-
tion components in core storage.
3.1.10 Address Switches (AS) (Systems 3.06.06.1-3.06.10.1)
The address switch is a 15-position gating circuit with positions labeled (3-17). The
switches receive information from the program counter or the adders and this informa-
tion can be gated through the switches to the address register, shift counter, or storage
register.
3.1.11 Tag Registers (Systems 2.08.01.1)
The tag register is a three-position trigger register numbered 18, 19, and 20. It is
fed directly from the multiplexor storage buses and is used to hold the tag portion of an
instruction during the instruction execution.
3.1.12 Adders (AD) (Systems 2.02.01. 1-2.02.37.1)
The adders are transistor switching circuits used to combine binary numbers or words
into a binary sum. There are 37 separate adders (Q), (P), (1-35) in the adder unit
capable of adding two binary words.
The adders do the arithmetic calculation of the system. Basically all the system will
do is add. Subtraction is done by adding a complement number. Multiplication is
accomplished by a series of additions and shifts. Division is accomplished by a series
of complement additions and shifts.
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