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At the output connector, on each output pin, place a capacitor shunt to ground. This capacitor shunt
placement removes high-frequency common-mode EMI that can contaminate the PCB traces between the
LC filter and the output connector. Again, this placement works on common mode so the ground
connection to the ground plane should be at the same point which improves EMI above the 50 MHz
region.
1.11.3
Input Filtering
The input pins and PCB traces are part of a high impedance node that can be easily contaminated with
EMI from inside the device or from radiated EMI inside the amplifier package. TI recommends an RC filter
with the R in series with the signal and the C in shunt to ground. An RCR filter may be needed so that the
capacitor does not directly load the signal source (see
NOTE: For best system noise performance use the smallest resistor values possible. If the resistor
value is too high noise will increase.
1.12 Paralleling Outputs
The TAS54x4C devices can have the channels placed in parallel to increase the current capability to drive
lower impedance loads. Some simple rules can be followed to correctly place the channels in parallel. The
outputs must be paralleled after the inductors. The outputs cannot be paralleled before the inductors
because the turn on and turn off times of the output FETS can be different on each channel.
NOTE: New to the TAS54x4C devices is the ability to parallel channels 1 and 2, and 3 and 4. When
channels 1 and 2 are paralleled, the output must still be paralleled after the inductors, and
the input signal is placed on channel 2. The channel 1 input can be left disconnected. When
channels 3 and 4 are paralleled the input signal is placed on channel 3 and the input on
channel 4 can be left disconnected.
The power is still voltage limited. To increase the power specification, a lower load impedance is
necessary. For example, one channel into a 4 Ω load at 14.4 VDC can provide 28W at 10% THD. By
paralleling two channels, one channel still has 23 W at 1% into 4 Ω, but 46 W into 2 Ω. If three channels
are in parallel, the amplifier provides 69 W into 1.33 Ω. Four channels in parallel can provide 92 W into
1 Ω.
Another example where this practice works well is near the maximum PVDD. One channel into 4 Ω at 21
VDC can provide 58 W at 10% THD. One channel into 2 Ω at 21 VDC is not recommended because of
thermal limitations, but two paralleled channels into 2 Ω can provide 116 W at 10% THD. By sharing the
current with two channels the losses because of r
reduced. Four channels into 1 Ω would provide over 232 W at 10% THD.
1.13 Mute
Muting is performed by ramping the gain from the I
determined by the capacitor that is on the MUTE pin on the TAS54x4C devices. The specified capacitor
value is 220 nF. The ramp time can be reduced by decreasing the value of the capacitor.
1.14 Standby
The transition from standby mode to active mode should be quick. A slow transition from standby to active
mode can cause a pop or click in the speakers. A quick transition does not have this issue. Therefore,
placing a capacitor on this pin is not recommended. The transition time from 0 V to 3.3 V and from 3.3 V
to 0 V should be less than 25 µs.
SLOA196 – June 2014
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Figure
are reduced and therefore the thermal limitation is
DS(on)
2
C gain setting to zero. The time to perform this ramp is
Copyright © 2014, Texas Instruments Incorporated
TAS54x4C Hardware Design Guidelines
1).
TAS54x4C Design Guide
17
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