Texas Instruments TAS5707 Manual

20-w stereo digital audio power amplifier with eq and drc

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20-W STEREO DIGITAL AUDIO POWER AMPLIFIER WITH EQ AND DRC
FEATURES
1
• Audio Input/Output
23
– 20-W Into an 8-Ω Load From an 18-V Supply
– Wide PVDD Range, From 8 V to 26 V
– Efficient Class-D Operation Eliminates
Need for Heatsinks
– Requires Only 3.3 V and PVDD
– One Serial Audio Input (Two Audio
Channels)
– Supports 8-kHz to 48-kHz Sample Rate
2
(LJ/RJ/I
S)
Audio/PWM Processing
– Independent Channel Volume Controls With
24 dB to Mute
– Soft Mute (50% Duty Cycle)
– Programmable Dynamic Range Control
– 14 Programmable Biquads for Speaker EQ
and Other Audio Processing Features
– Programmable Coefficients for DRC Filters
– DC Blocking Filters
General Features
– Serial Control Interface Operational Without
MCLK
– Factory-Trimmed Internal Oscillator for
Automatic Rate Detection
– Surface Mount, 48-PIN, 7-mm × 7-mm
HTQFP Package
– Thermal and Short-Circuit Protection
Benefits
– EQ: Speaker Equalization Improves Audio
Performance
– DRC: Dynamic Range Compression. Can
Be Used As Power Limiter. Enables
Speaker Protection, Easy Listening,
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
iPod is a trademark of Apple Inc.
2
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Check for Samples:
TAS5707 TAS5707A
– Autobank Switching: Preload Coefficients
– Autodetect: Automatically Detects
APPLICATIONS
Television
iPod™ Dock
Sound Bar
DESCRIPTION
The TAS5707 is a 20-W, efficient, digital-audio power
amplifier for driving stereo bridge-tied speakers. One
serial data input allows processing of up to two
discrete audio channels and seamless integration to
most digital audio processors and MPEG decoders.
The device accepts a wide range of input data and
data rates. A fully programmable data path routes
these channels to the internal speaker drivers.
The TAS5707 is a slave-only device receiving all
clocks from external sources. The TAS5707 operates
with a PWM carrier between a 384-kHz switching rate
and 352-KHz switching rate, depending on the input
sample
fourth-order noise shaper provides a flat noise floor
and excellent dynamic range from 20 Hz to 20 kHz..
The TAS5707A is identical in function to the HTQFP
packaged TAS5707, but has a unique I
address. The address of the TAS5707 is 0x36. The
address of the TAS5707A is 0x3A.
SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009
Night-Mode Listening
for Different Sample Rates. No Need to
Write New Coefficients to the Part When
Sample Rate Changes.
Sample-Rate Changes. No Need for
External Microprocessor Intervention
rate.
Oversampling
Copyright © 2008–2009, Texas Instruments Incorporated
TAS5707, TAS5707A
combined
with
a
2
C device

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Summary of Contents for Texas Instruments TAS5707

  • Page 1 The TAS5707A is identical in function to the HTQFP packaged TAS5707, but has a unique I C device – EQ: Speaker Equalization Improves Audio address. The address of the TAS5707 is 0x36. The Performance address of the TAS5707A is 0x3A. – DRC: Dynamic Range Compression. Can Be Used As Power Limiter.
  • Page 2: Simplified Application Diagram

    SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 3: Functional View

    FET Out OUT_D mDAP Protection Logic Click and Pop MCLK Sample Rate Control SCLK Autodetect and PLL LRCLK Microcontroller Based Serial System Control Control Terminal Control B0262-02 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 4 Drive Pulldown Resistor GVDD_AB PGND_AB Regulator GVDD_AB BST_A PVDD_A PWM_A Gate Timing OUT_A Ctrl Drive Pulldown Resistor PGND_AB B0034-05 Figure 1. Power Stage Functional Block Diagram Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 5 VREG SSTIMER TAS5707 OC_ADJ AGND AVSS DVSS PLL_FLTM DVDD PLL_FLTP STEST VR_ANA RESET 13 14 15 16 17 18 19 20 21 22 23 24 P0075-01 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 6: Pin Functions

    (2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic levels if the pins are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input). Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 7: Absolute Maximum Ratings

    RECOMMENDED OPERATING CONDITIONS UNIT Digital/analog supply voltage DVDD, AVDD Half-bridge supply voltage PVDD_X High-level input voltage 5-V tolerant Low-level input voltage 5-V tolerant Operating ambient temperature range °C Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 8: Pwm Operation At Recommended Operating Conditions

    (1) Continuous operation above the recommended junction temperature may result in reduced reliability and/or lifetime of the device. PWM OPERATION AT RECOMMENDED OPERATING CONDITIONS PARAMETER TEST CONDITIONS VALUE UNIT 11.025/22.05/44.1-kHz data rate ±2% 352.8 Output sample rate 48/24/12/8/16/32-kHz data rate ±2% Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 9: Pll Input Parameters And External Filter Components

    Connected when drivers are tristated to provide bootstrap kΩ the output of each half-bridge capacitor charge. (1) This does not include bond-wire or pin resistance. (2) Specified by design Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 10 = 0.25 W, f = 1kHz (AD Mode) A-weighted, f = 1 kHz, maximum power at Signal-to-noise ratio THD < 1% (1) SNR is calculated relative to 0-dBFS input level. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 11: Serial Audio Ports Slave Mode

    LRCLK clock edge with respect to the falling edge of SCLK –1/4 period tr / Rise/fall time for SCLK/LRCLK (SCLK/LRCLK) SCLK (Input) (edge) LRCLK (Input) SDIN T0026-04 Figure 2. Slave Mode Serial Data Interface Timing Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 12: I 2 C Serial Control Port Operation

    Load capacitance for each bus line w(H) w(L) T0027-01 Figure 3. SCL and SDA Timing (buf) Start Stop Condition Condition T0028-01 Figure 4. Start and Stop Conditions Timing Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 13: Reset Timing (Reset)

    Enable via I C. T0421-01 NOTE: On power up, it is recommended that the TAS5707 RESET be held LOW for at least 100 μs after DVDD has reached 3.0 V NOTE: If the RESET is asserted LOW while PDN is LOW, then the RESET must continue to be held LOW for at least 100 μs after PDN is deasserted (HIGH).
  • Page 14: Total Harmonic Distortion + Noise

    = 10 kHz f = 10 kHz 0.001 0.001 0.01 0.01 − Output Power − W − Output Power − W G005 G006 Figure 10. Figure 11. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 15 Left to Right −90 −90 −100 −100 10k 20k 10k 20k f − Frequency − Hz f − Frequency − Hz G013 G014 Figure 14. Figure 15. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 16 = 8 Ω −20 −30 −40 −50 −60 Right to Left −70 −80 Left to Right −90 −100 10k 20k f − Frequency − Hz G015 Figure 16. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 17: Detailed Description

    DETAILED DESCRIPTION POWER SUPPLY To facilitate system design, the TAS5707 needs only a 3.3-V supply in addition to the (typical) 18-V power-stage supply. An internal voltage regulator provides suitable voltage levels for the gate drive circuitry. Additionally, all circuitry requiring a floating voltage supply, e.g., the high-side gate drive, is accommodated by built-in bootstrap circuitry requiring only a few external capacitors.
  • Page 18: Sstimer Functionality

    (also called soft unmute) as defined in volume register (0X0E). SERIAL DATA INTERFACE Serial data is input on SDIN. The PWM outputs are derived from SDIN. The TAS5707 DAP accepts serial data in 16-, 20-, or 24-bit left-justified, right-justified, and I S serial data formats.
  • Page 19: Serial Interface Control And Timing

    C COMPATIBLE SERIAL CONTROL INTERFACE The TAS5707 DAP has an I C serial control slave interface to receive commands from a system controller. The serial control interface supports both normal-speed (100-kHz) and high-speed (400-kHz) operations without wait states.
  • Page 20 LRCLK Right Channel Left Channel SCLK SCLK 16-Bit Mode T0266-01 NOTE: All data presented in 2s-complement form with MSB first. Figure 19. I S 32-f Format Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 21 19 18 19 18 16-Bit Mode 15 14 15 14 T0034-02 NOTE: All data presented in 2s-complement form with MSB first. Figure 20. Left-Justified 64-f Format Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 22 16 Clks LRCLK Right Channel Left Channel SCLK SCLK 16-Bit Mode T0266-02 NOTE: All data presented in 2s-complement form with MSB first. Figure 22. Left-Justified 32-f Format Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 23 19 18 15 14 20-Bit Mode 19 18 15 14 19 18 15 14 16-Bit Mode 15 14 15 14 T0034-03 Figure 23. Right Justified 64-f Format Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 24 19 18 15 14 19 18 15 14 16-Bit Mode 15 14 15 14 T0092-03 Figure 24. Right Justified 48-f Format Figure 25. Right Justified 32-f Format Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 25: I 2 C Serial Control Interface

    Figure The 7-bit address for TAS5707 is 0011 011 (0x36). The 7-bit address for the TAS5707A is 0011 101 (0x3A). The TAS5707 address can be changed from 0x36 to 0x38 by writing 0x38 to device slave address register 0xF9.
  • Page 26 TAS5707 again responds with an acknowledge bit. Next, the master device transmits the data byte to be written to the memory address being accessed. After receiving the data byte, the TAS5707 again responds with an acknowledge bit. Finally, the master device transmits a stop condition to complete the single-byte data write transfer.
  • Page 27 Initially, a write is done to transfer the address byte or bytes of the internal memory address to be read. As a result, the read/write bit becomes a 0. After receiving the TAS5707 address and the read/write bit, TAS5707 responds with an acknowledge bit.
  • Page 28 Control Decay Filters T, K, O 0x3A 0x40, 0x41, 0x42 0x3B / 0x3C Alpha Filter Structure –1 NOTE: = 1 – B0265-01 Figure 32. DRC Structure Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 29: Bank Switching

    44.1/48 kHz mode, and bank 3 is used for all other rates. Combined with the clock-rate autodetection feature, bank switching allows the TAS5707 to detect automatically a change in the input sample rate and switch to the appropriate bank without any MCU intervention.
  • Page 30 Hex (9.17 Format) 131072 20000 1.77 231997 38A3D –5 0.56 73400 11EB8 (X/20) L = 10 D = 131072 × L H = dec2hex (D, 8) Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 31 TAS5707, TAS5707A www.ti.com SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009 Recommended Use Model Figure 36. Recommended Command Sequence Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 32 C (see Users's Guide for typical values): Biquads (0x29-36) DRC parameters (0x3A-3C, 0x40-42, and 0x46) Bank select (0x50) Configure remaining registers Exit shutdown (sequence defined below). Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 33 Ramp down AVDD/DVDD while ensuring that it remains above 3V until PVDD is below 6V and that it is never more than 2.5V below the digital inputs. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 34 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 (1) Reserved registers should not be accessed. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 35 0x0000 0000 0x34 ch2_bq[4] u[31:26], b0[25:0] 0x0080 0000 u[31:26], b1[25:0] 0x0000 0000 u[31:26], b2[25:0] 0x0000 0000 u[31:26], a1[25:0] 0x0000 0000 u[31:26], a2[25:0] 0x0000 0000 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 36 (3) "ae" stands for µ of energy filter, "aa" stands for µ of attack filter and "ad" stands for µ of decay filter and 1- µ = ω. All DAP coefficients are 3.23 format unless specified otherwise. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 37: Clock Control Register (0X00)

    SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009 CLOCK CONTROL REGISTER (0x00) The clocks and data rates are automatically determined by the TAS5707. The clock control register contains the auto-detected clock status. Bits D7–D5 reflect the sample rate. Bits D4–D2 reflect the MCLK frequency. The...
  • Page 38: Error Status Register (0X02)

    = 32 kHz – – – – – – Reserved – – – – – – De-emphasis for f = 48 kHz (1) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 39: Serial Data Interface Register (0X04)

    SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009 SERIAL DATA INTERFACE REGISTER (0x04) As shown in Table 9, the TAS5707 supports 9 serial data modes. The default is 24-bit, I S mode, Table 9. Serial Data Interface Control Register (0x04) Format RECEIVE SERIAL DATA WORD D7–D4...
  • Page 40: System Control Register 2 (0X05)

    Soft unmute channel 1 – – – – – – – Soft mute channel 2 – – – – – – – Soft unmute channel 2 – – Reserved Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 41: Volume Registers (0X07, 0X08, 0X09)

    1 –78.5 dB 0 –79.0 dB 1 Values between 0xCF and 0xFE are Reserved 1 MUTE (default for master volume) (1) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 42: Master Fine Volume Register (0X0A)

    – – – – Volume slew 256 steps (21ms volume ramp time at 48kHz) – – – – – Reserved (1) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 43: Modulation Limit Register (0X10)

    REGISTER AD MODE BD MODE 0x11 0xAC 0xB8 0x12 0x54 0x60 0x13 0xAC 0xA0 0x14 0x54 0x48 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 44: Start/Stop Period Register (0X1A)

    7383.7-ms 50% duty cycle start/stop period – – – 9897.3-ms 50% duty cycle start/stop period – – – 13,196.4-ms 50% duty cycle start/stop period (1) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 45: Oscillator Trim Register (0X1B)

    SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009 OSCILLATOR TRIM REGISTER (0x1B) The TAS5707 PWM processor contains an internal oscillator to support autodetect of I2S clock rates. This reduces system cost because an external reference is not required. Currently, TI recommends a reference resistor value of 18.2 kΩ...
  • Page 46: Input Multiplexer Register (0X20)

    Selects which PWM channel is output to OUT_D Note that channels are enclosed so that channel 1 = 0x00, channel 2 = 0x01, channet 1 = 0x02, and channel 2 = 0x03. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 47: Drc Control (0X46)

    – – – – – DRC turned OFF – – – – – – – DRC turned ON – Reserved (1) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 48: Bank Switch And Eq Control (0X50)

    – 11.025/12 kHz, does not use bank 1 – – – – – – – 11.025/12 kHz, uses bank 1 (1) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 49 – – – – – Automatic bank selection – – – – – Reserved – – – – – Reserved (2) Default values are in bold. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 50 Changed de-emphasis settings in register 0x03 table ......................• Added text to Modulationi Limit Register section ........................ • Added text to the DRC Control section ..........................Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TAS5707 TAS5707A...
  • Page 51 Level-3-260C-168 HR 0 to 85 TAS5707A & no Sb/Br) TAS5707PHP ACTIVE HTQFP Green (RoHS CU NIPDAU Level-3-260C-168 HR 0 to 85 TAS5707 & no Sb/Br) TAS5707PHPR ACTIVE HTQFP 1000 Green (RoHS CU NIPDAU Level-3-260C-168 HR 0 to 85 TAS5707 & no Sb/Br) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
  • Page 52 PACKAGE OPTION ADDENDUM www.ti.com 9-Sep-2014 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
  • Page 53: Tape And Reel Information

    PACKAGE MATERIALS INFORMATION www.ti.com 30-Mar-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) TAS5707APHPR HTQFP 1000 330.0 16.4 12.0 16.0 TAS5707APHPR HTQFP 1000...
  • Page 54 PACKAGE MATERIALS INFORMATION www.ti.com 30-Mar-2017 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) TAS5707APHPR HTQFP 1000 367.0 367.0 38.0 TAS5707APHPR HTQFP 1000 336.6 336.6 31.8 TAS5707PHPR HTQFP 1000 367.0 367.0 38.0 TAS5707PHPR HTQFP 1000 336.6...
  • Page 59 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...

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