JVC RC-BZ5LB Service Manual page 20

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RC-BZ5LB/BZ5RD
RC-BZ6BU
LC72136N (IC2) : PLL Frequency sinsesizer
1.Terminal layout
XT
FM/AM
CE
DI
CLOCK
DO1
FM ST VCO STOP
AM/FM
NC
NC
SDIN
2. Block diagram
1
22
16
15
3
4
C B
2
I/F
5
6
Power
on
17
Reset
21
3. Pin function
Pin
Symbol I/O
No.
X'tal oscillator connect (75KHz)
I
1 XT
LOW:FM mode (Not use)
O
2 FM/AM
When data output/input for 4pin(input) and
CE I
3
6pin(output): H
Input for receive the serial data from
I
DI
4
controller
Sync signal input use
CLOCK I
5
Data output for Controller
DO1 O
6
Output port
"Low": MW mode
O
7 FM ST
VCO STOP
O
AM/FM
8
Not use
-
9 NC
Not use
NC -
10
Data input/output (Not use)
SDIN I/O
11
1-20
1 XT
22
2 GND
21
3
LPFOUT
20
4
LPFIN
19
5 PD
18
6 VCC
17
7
FMIN
16
8
AMIN
15
9 NC
14
10 IFCONT
13
11
IFIN
12
Reference
Driver
Swallow Counter Swallow Counter
1/2 1/16,1/17 4bit 1/16,1/17 4bit
12bit
Programmable
DriverS
Data Shift Register & Latch
7 8 2 11 13
Function
Digitized in Heiloo Netherlands
Phase
Detector
18
Charge Pump
19
20
Unlock
Detector
12
Universal
Counter
Pin
No. Symbol I/O
IF counter signal input
IFIN I
12
IF signal output
IFCONT O
13
Not use
14 NC -
AM Local OSC signal output
AMIN I
15
FM Local OSC signal input
16 FMIN I
Power supply(VDD=4.5
17 VCC -
When power ON:Reset circuit move
PLL charge pump output(H: Local OSC
PD O
18
frequency Height than Reference frequency.
L: Low Agreement: Height impedance)
Input for active lowpassfilter of PLL
I
19 LPFIN
Output for active lowpassfilter of PLL
LPFOUT O
20
Connected to GND
GND -
21
X'tal oscillator(75KHz)
22 XT I
11/28/2017
Function
5.5V)