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Inputs and outputs
3) Connect a dc control voltage to J4 (IN+) ranging from ground to V
terminal J5 (IN–) is held to V
in the schematic. Therefore, a dc control voltage of V
output from OUT+ to OUT–.
If a different bias or offset is required, the voltage divider resistors R1 and
R2 may be replaced. The value of R1 and R2 in parallel should not exceed
1 kΩ to minimize gain error due to imbalance in the impedance of the
differential input stage. Alternatively, the resistor divider may be removed
and a different common voltage output (such as from an op-amp buffer or a
power supply) may be connected to J5 (IN–).
Note:
The common mode input range of the DRV591VFP is 1.2 V to 3.8 V when
using a 5-V supply, and 1.2 V to 2.1 V when using a 3.3-V supply. Refer to
the DRV591 data sheet, TI literature number SLOS389.
4) Connect a load across J6 (OUT+) and J7 (OUT–). The polarity of the
connection depends on the operation of the dc control voltage. As the
voltage at IN+ becomes greater than the voltage at IN–, the voltage at
OUT+ increases, causing current to flow from OUT+ to OUT–. Similarly,
as the voltage at IN+ decreases lower than IN–, the voltage at OUT–
increases, causing current to flow from OUT– to OUT+.
For example, consider the load to be a TEC element and the dc control
voltage to be the output of a temperature control circuit. In this example,
as temperature increases the output of the temperature control circuit
increases. The TEC element should therefore be connected with the
anode at OUT+ and the cathode at OUT– to ensure that the TEC element
cools when the temperature increases.
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Evaluation module jumpers, LEDs, and test points
5) Jumper J1 (INT/EXT) should be ON for normal operation.
When J1 is ON, the internal oscillator is used to generate the switching
outputs. When J1 is OFF, an external TTL-compatible clock signal may be
driven into the COSC pin of the DRV591VFP. The capacitor C9 must be
removed and a wire may be soldered to the pad closest to the IC for
connecting the external clock.
6) Jumper J2 (FREQ) should be ON for normal operation.
When J2 is ON, the device is configured for 500-kHz operation.
When J2 is OFF, the device is configured for 100-kHz operation. However,
capacitor C9 must be removed and replaced with a 1-nF capacitor for
proper operation.
7) Jumper J3 (SHUTDOWN) should be ON for normal operation. (Remove
J1 to place the DRV591VFP in shutdown mode.)
If an external shutdown control signal is to be used, it should be connected
to the right–hand pin of J1 (which is connected to resistor R3). The control
signal must be TTL–compatible; a logic high provides normal operation, a
logic low places the DRV591VFP in shutdown.
Operating Instructions List
/2 with a resistor voltage divider, as shown
DD
DD
Operating Instructions
. The
DD
/2 provides 0-V
2-3
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