Table of Contents
Advertisement
Bits 16 through
Bits
normal
Processor
Figure
the configuration
Figure
EPROM
Processor
Card
The CSC/3
functions
be
installed
change
changed
is
side and jumpers
IIIIIIIIIIIIIIIIIIIIIHIHL1
Jumpers
W71
W53
W52
W51
Figure
and
24
19
bit
are
20
23 the
four
through
pairs
however
operation
they can
mode
and Cache
Disable
5-4 which
shows
the
optional
on
register
processor
24
23
/1/
Slave
Reset
and CSC/4
5-4
CSC/3
Optional
Jumpers
and CSC/4
processor
of erasable
for
the
different
sizes
These
jumpers
changed
are
these
junpersfron
their
shows
5-5
Figure
the
W5
through
U47
U48
ft
U45
U46
U43
tJ44
ft
U42
U41
ft
System
software
EPROMs
______
Console
connector
EPROM
and CSC/4
5-5
CSC/3
used
not currently
of pins
toward
the
far
left
be used
invoke
the Slave
to
functions
respectively
jumper
configurations
card
in
installed
the
connector
register
22
20
21
Bits
\--
Cache
disable
Halt
Configuration
Register
Settings
have
cards
jumpers
configurable
programmable
read-only
EPROM
when
only
the
unless
are instructed
default
you
settings
W51
of
jumpers
positions
W52
CSC/4
on
card
the
right
11111111111111111111111111L1
Jumpers
U47
W71
U45
W52
W51
U43
U41
System
EPROMs
Console
connector
LocationsPartial
Jumper
of
header
are not used
the
50-pin
mode
External
Reset
function
card
on
any processor
represents
front-edge
partial
card
cage
control
that
critical
EPROMs
memories
memory
changed
sizes
are
do
when
to
so
W53
CSC/3
on
the
through
side
U48
ft
U46
U44
ft
U42
ft
software
Views
Component-Side
Cards
Configuring
in
Halt
view
of
memory
can
that
Do
not
the
software
card
left
Maintenance
5-7
Advertisement
Table of Contents
