Philips 32PFL5604H/12 Service Manual page 57

8.10 Diagram SSB: T-Con DC/DC (Sharp panel)
Block Diagram
SW2
CTL2
PG2
REG
LDFB1
LDCTL1
LDPG1
LDO1
GND
RT
LDFB2
LDO2
LDVCC2
CTL3
SW3
BOOT3
Pin configuration
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Buck
Converter
PGND1
REG
LDO 1
PVCC2
LDO 2
Synchronous
buck converter
Name Description
PGND3 Ground
PG3 Power Good Output 3
DTC3 Duty Control Input 3
COMP3 Error Amp Output 3
FB3 Feed Back Input 3
PVCC3 Power Supply Input
LDFB3 LDO Feed Back Input 3
LDCTL3 LDO3 Control Input
LDO3 LDO Output 3
IN1 AMP Input 1
IN2 AMP Input 2
IN3 AMP Input 3
IN4 AMP Input 4
IN+ COM Input +
IN- COM Input -
VCOM COM Output
OUT4 AMP Output 4
OUT3 AMP Output 3
OUT2 AMP Output 2
OUT1 AMP Output 1
HGND Ground
CPFB2 Charge Pump Feed Back Input 2
CPCTL CP Control Input
C2 Charge Pump Input
VCP2 Charge Pump LDO Output 2
HVCC CP Control Input
VCP1 Charge Pump Input 2
C1 Charge Pump LDO Output 2
CPPG CP Power Good Output
CPFB1 Charge Pump Feed Back Input 1
PGND1 Ground
PG1 Power Good Output 1
Figure 8-10 Block Diagram and pin configuration
IC Data Sheets
B09A, BD8162EKV (IC 7T01-1)
VREF PROTECT
Positive
Charge
Pump
Negative
Charge
Pump
OSC
LDO 3
HVCC
Number
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Q543.3E LA
PG1
Boost
Converter
PGND1
CPFB1
CPPG
HGND
C1
VCP1
HVCC
VCP2
C2
HGND
CPCTL
CPFB2
HGND
OUT1
OUT2
OUT3
OUT4
Name Description
SW1 Power Switch Output 1
PGATE Pch Gate Drive Output
DTC1 Duty Control Input 1
COMP1 Error Amp Output 1
FB1 Feed Back Input 1
CTL1 Control Input 1
FAULT Protect Detection Output
SCP Short Protection Current Output
UVLO UVLO Input
VCC Power Supply Input
VREF Reference Voltage Output
FB2 Feed Back Input 2
COMP2 Error Amp Output 2
DTC2 Duty Control Input 2
PVCC2 Power Supply Input
BOOT2 Boot Strap Terminal 2
SW2 Power Switch Output 2
CTL2 Control Input 2
PG2 Power Good Output 2
REG Boot Strap Regulator Output
LDFB1 LDO Feed Back Input 1
LDCTL1 LDO1 Control Input
LDPG1 LDO1 Power Good Output
LDO1 LDO Output 1
GND Ground
RT Connect Resistor for Frequency Setup
LDFB2 LDO Feed Back Input 2
LDO2 LDO Output 2
LDVCC2 Power Supply Input
CTL3 Control Input 3
SW3 Power Switch Output 3
BOOT3 Boot Strap Terminal 3
8. EN 57
18442_300_091207.eps
091207
2010-Jun-29