The scanner's control circuits are implemented using a total of five boards.
2.3.1 Control Circuit Outline
The scanner CPU is an 16-bit, single-chip M37720W!FP, which operates at 16 MHz. To simpli~
the circuitry, the circuits for correcting the image data signals are collected into three gate arrays.
Figure 2-9 is a block diagram of the control circuitry.
Scanner
Image
Head
RAM
Data
. . . . . . . . . . . . . . . . . .
I
Gate
AMP,
ICI
AID
Convertor
Lamp
Control w
Gate Array
Lamp
Figure 2-9. Control Circuit Block Diagram
Rev. A
RAM
. . . . . . . . . . . . . . . . . . . . .
Array
Gate Array
CPU
M37720S1AFP
Motor
IM RAM
Driver
CR motor
HP sensor
RAM
. . . . . . . . . . . . . . . . . . . .
Gate Array
E02A11
1 M ROM
Scsl
IM
RAM
. . . . . . . . . . . . . . . . . . .
Gate Array
Gate Array
Bidirectional
Parallel l/F
2-7