Mitsubishi MELSEC-Q Series Programming Manual page 68

(c) 32-bit index setting for FXCPU
4.6 Index Setting
4-46
5) The following figure shows the examples of 32-bit index setting using 'ZZ' and
their actual processing devices.
Ladder example
X0
DMOV
EN ENO
K100000 s
MOV
EN ENO
K-20 s
X1
MOV
EN ENO
s
ZR1000ZZ0
Figure 4.6-5 Ladder examples and actual processing devices
6) Functions that can use 'ZZ'
32-bit index settings using 'ZZ' can be used in the following functions.
No.
1
Device specification of instructions in a program
2
Watch function
3 Current value change function
4
Executional conditioned device test
Sampling trace
5
(Trace setting (Data get timing setting), trace target devices)
ZZn cannot be used individually such as 'DMOV K100000 ZZ0'. When setting a
value to index registers to specify a 32-bit index setting using 'ZZ', set a value to
Zn (Z0 to Z19).
ZZn cannot be entered individually in the functions.
Combine index registers V (from V0) and Z (from Z0) for a 32-bit index setting.
V is used for high order and Z is used for low order. With the combination of the
specified Z and the corresponding V, the device can be used as a 32-bit register.
Note that the index setting is not applied by specifying the high order V.
Example: When specifying Z4, V4 and Z4 are used as a 32-bit register.
Setting value
Z0
Z1
Z2
Z3
Z4
Z5
Z6
Z7
d Z0
Description
d Z2
d
D30Z2
Description
Index register
V0, Z0
V1, Z1
V2, Z2
V3, Z3
V4, Z4
V5, Z5
V6, Z6
V7, Z7
Actual processing device
X1
MOV
EN ENO
ZR101000 s d
ZR1000ZZ0 ZR(1000+100000) ZR101000
D30Z2 D(30-20) D10
D10