Timer; Timer Control Register - Sundance Spas SMT335E User Manual

Version 3.0

Timer

The TIM TCLK0 and TCLK1 signals can be routed to the DSP's TOUT/TINP pins.
The signal direction must be specified, together with the routing information in the

timer control register.

Timer Control Register
Field Description
0
TCLK0EN
1
0
TCLK1EN
1
If the TIM TCLKx pin is selected as an output, the C6000 TOUTx signal will be used
to drive it. The TIM TCLKx pin will always drive the C6000 TINPx input.
C6x
31–6
TIM TCLK0 is an input
Enable TIM TCLK0 as an output
TIM TCLK1 is an input
Enable TIM TCLK1 as an output
TCLK0EN
TOUT0
TINP0
FPGA
Page 37 of 53
5
TCLK1 EN TCLK9 EN
RW,0
TCLK0
SMT335E SMT375E User Manual
TCLK 0x03C00000
4 3–0
RW,0