Introduction; Rules To Create A Good Layout - Fujitsu F2MC-16LX Series Application Note

1. Introduction

In the following description, the EMC design guide of 16-bit Fujitsu microcontrollers will be
discussed. It describes how external power supply should be connected to the Vcc and Vss
pins and offers some suggestions. An overview of internal supply of MCU is made as well to
have a better understanding of the design. The EMI measurements in the following described
tests are just example measurements. The measured emissions are no data, which are
specified in the DS of the microcontroller series.
During the last designs the EMI of the Fujitsu 16LX microcontroller series could be reduced
step by step. The PLL multiplier circuit allows the usage of low crystal frequency to reduce
high-frequency noise from the oscillator circuit.
The clock tree is mostly the cause of the noise. Therefore the driver capability of clock
buffers is optimised and for one big buffer are used several small clock buffers.
Further countermeasures like using of the MCU flash and core on a base of 3.3V level
reduces the noise level of the package. For the PWM outputs it is possible to use the slew
rate control. This means that the rise and fall time can ease to reduce the harmonics.
The integration of On-chip bypass capacitors reduces the noise ripple on the internal power
supply net so that the broadband noise on the IO pins is improved.
The following description is based on the MB90F540 and 590 series, but the same situation
exists for all current series of the 16LX family, with or without an external bus interface.

2. Rules to create a good Layout

1. Use max. trace-width and min. length to connect VSS and VDD µC-pins to
decoupling capacitors (DeCap)
2. Don't use stub line to connect the DeCap to µC-pins, let flows the noise current direct
through pads of DeCap
3. Use close ground plane direct below MCU package as shield
4. Use different ground systems for analogue, digital, power-driver and connector
ground
5. Avoid loop current in the ground system, check for ground loops.
6. Use a star point ground below MCU for analogue and digital ground, use a second
star point ground below 5V regulator for MCU, power-driver and connector ground
7. Don't create signal loop on the PCB, minimize trace length
8. Partitioned system into analogue, digital and power-driver section
9. Place series resistor or RC-block for the IO-circuit nearby MCU-pin to reduce the
noise on the signal line.
10. Use a capacitor for each connector pin to reduce the noise of external lines, place
this capacitor close to connector pin
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