Block Diagram Signal Lines - Sanyo P50842-00 Troubleshooting Manual

BLOCK DIAGRAM SIGNAL LINES

AnalogUnit
RF-IN
Digital/
Analog
AV1_CVBS
Component/Composite
AV2(YPbPr)
AV1_LR
AV2_LR
IEC958
S/P DIF
Line Out
Key switch+RC
Power LED
I
Remote
(64Mb: 8MB)
HDMI1
(or DVI)
sLDM
DDC
HDMI
MUX
HDMI2
DDC
IF
ATSC
Digital &
I2
Analog
Decoder
IF_AGC
Composite
AFE
Input
Mux
DVI_L/R
A
A
Back Light level (PWM)
Back Light cont. (BLON)
Speaker+
TV Speakers
(10W+10W)
– 26 –
DDR2
SPI Flash
512Mb
(400MHz)
Memory
Interface
USB 2.0
Unit
BackEnd
CPU
Sub CPU
H.264, VC1
Dual-Audio
MPEG4
Processing
MPEG2
Unit
Decode Unit
Audio
NTSC
DAC
Decoder
Graphics
Unit Scaler
A/D
Converter
Audio
Audio ADC
LVDS
MUX
Audio
DSP
DD
I2C
XL/
I2S
R Vcc cont.
OP
AMP
Audio
ST Amp.
Speaker-
PanelUnit
Digital Unit
USB
USB
I2C
UART(Debug)
UART(Factory)
Clock_24.576MH
z
RESET
Out
+12V
Video data & Clk
(LVDS)