Sony CXD5602 User Manual page 77

3.1.4.3.16 SPI2
If the pin SYSTEM0 is Low and the pin SYSTEM1 is High when POR is released, pin P00_{00,01} and pin
P01_{00,01} are assigned SPI role automatically. For this reason, usually SPI2 role cannot be set by registers.
The following are settings to release roles assigned automatically by pin SYSTEM0 and pin SYSTEM1, and to
newly assign pin P00_{00,01} and pin P01_{00,01} SPI role for debugging.

DBG_HOSTIF_SEL.LATCH_OFF=1

IO_SPI2_CS_X.ENZI=1

IO_SPI2_SCK.ENZI=1

IO_SPI2_MOSI.ENZI=1

IOCSYS_IOMD0.SPI2A=1

IOCSYS_IOMD0.SPI2B=1
3.1.4.3.17 UART0
If the pin SYSTEM0 is High and the pin SYSTEM1 is Low when POR is released, pin P00_{00,01} are assigned
UART role automatically. For this reason, usually UART0 role cannot be set by registers.
The following is a setting that pin P01_{00,01} are used as URAT0_CTS or UART0_RTS.

IOCSYS_IOMD0.SPI2B=2
The following are settings to release roles assigned automatically by pin SYSTEM0 and pin SYSTEM1, and to
newly assign pin P00_{00,01} and pin P01_{00,01} UART role for debugging.

DBG_HOSTIF_SEL.LATCH_OFF=1

IO_SPI2_SCK.ENZI=1 (RXD input)

IO_SPI2_MOSI.ENZI=1 (CTS input)

IOCSYS_IOMD0.SPI2A=2

IOCSYS_IOMD0.SPI2B=2
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CXD5602 User Manual