Philips 32PFL5405H/05 Service Manual page 54

EN 54 7. Q552.1E LA
• Sil9287B (supports "Instaport" technology for fast
switching between input signals).
The hardware default I
• Sil9187A: 0xB0/0xB2 (random: software workaround)
• Sil9287B: 0xB2 (fixed).
The Sil9x87 has the following specifications:
• +5V detection mechanism
• Stable clock detection mechanism
• Integrated EDID
• RT control
• HPD control
• Sync detection
• TMDS output control
• CEC control
• EDID stored in Sil9x87, therefore there are no EDID pins
on the SSB.
7.7 Video and Audio Processing - PNX85500
The PNX85500 is the main audio and video processor (or
System-on-Chip) for this platform. It has the following features:
• Multi-standard digital video decoder (MPEG-2, H.264,
MPEG-4)
• Integrated DVB-T/DVB-C channel decoder
• Integrated CI+
• Integrated motion accurate picture processing (MAPP2)
2010-Feb-19
Circuit Descriptions
2
C addresses are:
PNX85500x
TS input
CI/CA
TS out/in for
PROCESSOR
PCMCIA
DVB-T/C
DVB
channel decoder
VIDEO
CVBS, Y/C,
DECODER
RGB
Low-IF DIGITAL IF
MPEG/H.264
AUDIO DEMOD
SSIF, LR
AND DECODE
AUDIO IN
SPDIF
HDMI
HDMI
RECEIVER
SYSTEM
CONTROLLER
(8051)
2
I C GPIO IR
Figure 7-14 PNX85500 functional diagram
• High definition ME/MC
• 2D LED backlight dimming option
• Embedded HDMI HDCP keys
• Extended colour gamut and colour booster
• Integrated USB2.0 host controller
• Improved MPEG artefact reduction compared with
PNX8543
• Security for customers own code/settings (secure flash).
The TV550 combines front-end video processing functions,
such as DVB-T channel decoding, MPEG-2/H.264 decode,
analog video decode and HDMI reception, with advanced
back-end video picture improvements. It also includes next
generation Motion Accurate Picture Processing (MAPP2). The
MAPP2 technology provides state-of-the-art motion artifact
reduction with movie judder cancellation, motion sharpness
and vivid colour management. High flat panel screen
resolutions and refresh rates are supported with formats
including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264
supports new TV experiences with IPTV and VOD. On top of
that, optional support is available for 2D dimming in
combination with LED backlights for optimum contrast and
power savings up to 50%.
For a functional diagram of the PNX85500, refer
to Figure
MEMORY
CONTROLLER
MPEG
SYSTEM
PRIMARY
VIDEO
OUTPUT
AV-PIP
SUB-PICTURE
3D COMB
SECONDARY
VIDEO
OUTPUT
Motion-accurate
VIDEO
pixel processing
DECODER
SCALER,
DE-INTERLACE
AND NOISE
REDUCTION
AUDIO DSP
450 MHz
AV-DSP
560 MHz
DRAWING
MIPS32
ENGINE
24KEf CPU
DMA BLOCK
2
ADC SPI UART I C GPIO Flash USB 2.0
x 8
back to
div. table
7-14.
LVDS for
flat panel display
LVDS
(single, dual or
quad channel)
VIDEO
analog CVBS
ENCODER
AUDIO DACS analog audio
2
I S
AUDIO OUT
SPDIF
SD Ethernet
Memory MAC
Card
18770_241_100201.eps
100219