Philips 32PFL5405H/05 Service Manual page 53

7.4 Front-End Analogue and DVB-T, DVB-C;
ISDB-T reception
7.4.1 European/China region
The Front-End for the European/China region consist of the
following key components:
• Hybrid Tuner
• Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter
(8 MHz) (China)
• Bandpass filter
• Amplifier
• PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.
Below find a block diagram of the front-end application for this
region.
Figure 7-10 Front-End block diagram European/China region
7.4.2 Brazil region
The Front-End for the Brazil region consist of the following key
components:
• Hybrid Tuner with integrated SAW filter and amplifier
• External ISDB-T channel decoder covering the Brazilian
digital terrestrial TV standard
• Bandpass filter
• Amplifier
• PNX85500 SoC TV with integrated analogue demodulator.
Below find a block diagram of the front-end application for this
region.
Figure 7-11 Front-End block diagram Brazil region
7.5 Front-End DVB-S(2) reception
The Front-End for the DVB-S(2) application consist of the
following key components:
2
• Satellite Tuner; I C address 0xC6 (bridged via channel
decoder)
Circuit Descriptions
18770_235_100127.eps
100219
7.6
18770_236_100127.eps
100219
back to
div. table
Q552.1E LA
2
• Channel decoder; I C address 0xD0
• LNB switching regulator; I
• Amplifier
• PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.
Below find a block diagram of the front-end application for
DVB-S(2) reception.
Figure 7-12 Front-End block diagram DVB-S(2) reception
This application supports the following protocols:
• polarization selection via supply voltage (18V = horizontal,
13V = vertical)
• band selection via "toneburst" (22 kHz): tone "on" = "high"
band, tone "off" = "low" band
• satellite (LNB) selection via DiSEqC 1.0 protocol
• reception of DVB-S (supporting QPSK encoded signals)
and DVB-S2 (supporting QPSK, 8PSK, 16APSK and
32APSK encoded signals), introducing LDPC low-density
parity check techniques.
HDMI
In this platform, the Silicon Image Sil9x87 HDMI multiplexer is
implemented. Refer to figure
the application.
Figure 7-13 HDMI input configuration
The following multiplexers can be used:
• Sil9187A (does not support "Instaport" technology for fast
switching between input signals)
7. EN 53
2
C address 0x14
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100219
7-13 HDMI input configuration for
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2010-Feb-19