CPU 31x-2 as DP Master/DP Slave and Direct Communication
2.6.8
Module Diagnostics
Definition
ID related diagnostics specifies in which one of the configured address areas of
transient memory an entry was made.
7
Byte 6
0 1
Length of ID-related diagnostic data
incl. byte 6 (up to 6 bytes, depending on the number of configured
address areas)
Code for module diagnosis
7 6 5 4
3
Byte 7
Default and0 actual configuration
Entry for the 1st configured address area
Entry for the 2nd configured address area
Entry for the 3rd configured address area
Entry for the 4th configured address area
Entry for the 5th configured address area
7 6 5 4 3
7 6 5 4 3
7 6 5 4 3
2 1
2 1
2 1
Byte 8
Byte 8
Byte 8
7 6 5 4 3
Byte 9
7 6 5 4 3
Byte 10
7 6 5 4 3
Byte 11
0
0
0
0
0
Figure 2-7
Structure of the Module Diagnosis of the CPU 31x-2
2-28
0 Bit No.
1
Bit No.
Default and0 actual configuration
Default and actual config. Slave CPU in STOP
Bit No.
Bit No.
Bit No.
0
0
0
Entry for the 6th to 13th configured address area
Bit No.
2 1
0
Entry for the 14th to 21st configured address area
2 1
0
Bit No.
Entry for the 22nd to 29th configured address area
Bit No.
2 1
0
Entry for the 30th configured address area
Entry for the 31st configured address area
Entry for the 32nd configured address area
PLC S7-300, CPU Specifications CPU 312 IFM to CPU 318-2 DP
A5E00111190-01