Sif Filtering - Sanyo AAI-A Series Training Manual

Circuit description block diagram of ics trouble shooting
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3-2 SIF Filtering Circuit
In the stereo model, the SIF signal is outputted
from pin 14 of IC181 and is supplied to the
base of the buffer transistor Q1 82.
In the monaural model, the video signal which also contains the SIF carrier signal is outputted
from pin 7 of IC101 and is supplied to the Qlll.
The SIF signal output from Q181 is supplied to pin 5 of IC101 through the sound bandpass
filtering circuit. The relevant bandpass filters Xl 51 (4.5 MHz), Xl 52 (5.5 MHz), Xl 53 (6. OMHZ),
Xl 54 (6.5MHz) are selected according to the output signals from pins 36 to 39 of the CPU.
The SIF signal is then fed via the relevant
buffer Q152 (4.5 MHz), Q154 (5.5 MHz), Q155
(6. OMHZ), Q156 (6.5MHz) to the SIF input pin 5 of IC101 for de-modulation.
7
CVBS Output
SIF Input 5
Iclol
If/Video
/chroma
4.5 MHZ 39
CPU
5.5 MHZ 3[
6.OMHZ 37
6.5 MHz 36
CVBS+Sound Carrier Outwt
i
Q153
0157
SIF Filterina Circuit
....................................................................................................
0112
C141
ni~?
X151
4.5 MHZ
E-w
F
+111-www-f
................................................................................................ . .......................................................
.,
IC181
Sound Carrier
SIF decoder
4
14
I
Q154
-
I
~
Q-f
II
F-J
i
X154
6.5 MHz
T
SIF System
Pin39
Auto
5.5 MHZ
L
6.OMHZ
L
6.5 MHz
L
4.5 MHZ
H
Pin38
H
H
L
L
L
T
Pin 37
Pin36
H
H
L
L
H
L
L
H
L
L
-23-
'4
k
..............
,_
Q182
k
8
(Qlll)
c
.—
2
3
R184
:Rlll)
Q152
Q154
Q155
Q156
*
On
On
On
off
On
off
off
off
off
On
off
off
off
off
On
On
off
off
off
' It dependson
receiving system,
AA1-A

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